xref: /openbmc/u-boot/include/configs/ot1200.h (revision ec35e123)
1 /*
2  * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
3  * Copyright (C) 2014 Bachmann electronic GmbH
4  *
5  * SPDX-License-Identifier:     GPL-2.0+
6  */
7 
8 #ifndef __CONFIG_H
9 #define __CONFIG_H
10 
11 #include "mx6_common.h"
12 
13 /* Size of malloc() pool */
14 #define CONFIG_SYS_MALLOC_LEN           (10 * 1024 * 1024)
15 
16 #define CONFIG_BOARD_EARLY_INIT_F
17 #define CONFIG_MISC_INIT_R
18 
19 /* UART Configs */
20 #define CONFIG_MXC_UART
21 #define CONFIG_MXC_UART_BASE           UART1_BASE
22 
23 /* SF Configs */
24 #define CONFIG_SPI
25 #define CONFIG_MXC_SPI
26 #define CONFIG_SF_DEFAULT_BUS  2
27 #define CONFIG_SF_DEFAULT_CS   0
28 #define CONFIG_SF_DEFAULT_SPEED 25000000
29 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
30 
31 /* IO expander */
32 #define CONFIG_PCA953X
33 #define CONFIG_SYS_I2C_PCA953X_ADDR	0x20
34 #define CONFIG_SYS_I2C_PCA953X_WIDTH	{ {0x20, 16} }
35 #define CONFIG_CMD_PCA953X
36 #define CONFIG_CMD_PCA953X_INFO
37 
38 /* I2C Configs */
39 #define CONFIG_SYS_I2C
40 #define CONFIG_SYS_I2C_MXC
41 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
42 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
43 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
44 #define CONFIG_SYS_I2C_SPEED            100000
45 
46 /* OCOTP Configs */
47 #define CONFIG_CMD_IMXOTP
48 #define CONFIG_IMX_OTP
49 #define IMX_OTP_BASE                    OCOTP_BASE_ADDR
50 #define IMX_OTP_ADDR_MAX                0x7F
51 #define IMX_OTP_DATA_ERROR_VAL          0xBADABADA
52 #define IMX_OTPWRITE_ENABLED
53 
54 /* MMC Configs */
55 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
56 #define CONFIG_SYS_FSL_USDHC_NUM       2
57 
58 /* USB Configs */
59 #define CONFIG_USB_STORAGE
60 #define CONFIG_USB_EHCI
61 #define CONFIG_USB_EHCI_MX6
62 #define CONFIG_MXC_USB_PORTSC   (PORT_PTS_UTMI | PORT_PTS_PTW)
63 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
64 
65 #ifdef CONFIG_MX6Q
66 #define CONFIG_CMD_SATA
67 #endif
68 
69 /*
70  * SATA Configs
71  */
72 #ifdef CONFIG_CMD_SATA
73 #define CONFIG_DWC_AHSATA
74 #define CONFIG_SYS_SATA_MAX_DEVICE	1
75 #define CONFIG_DWC_AHSATA_PORT_ID	0
76 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
77 #define CONFIG_LBA48
78 #define CONFIG_LIBATA
79 #endif
80 
81 /* SPL */
82 #ifdef CONFIG_SPL
83 #include "imx6_spl.h"
84 #define CONFIG_SPL_SPI_SUPPORT
85 #define CONFIG_SPL_LIBCOMMON_SUPPORT
86 #define CONFIG_SPL_SPI_FLASH_SUPPORT
87 #define CONFIG_SYS_SPI_U_BOOT_OFFS     (64 * 1024)
88 #define CONFIG_SPL_SPI_LOAD
89 #endif
90 
91 #define CONFIG_FEC_MXC
92 #define CONFIG_MII
93 #define IMX_FEC_BASE                    ENET_BASE_ADDR
94 #define CONFIG_FEC_XCV_TYPE             MII100
95 #define CONFIG_ETHPRIME                 "FEC"
96 #define CONFIG_FEC_MXC_PHYADDR          0x5
97 #define CONFIG_PHYLIB
98 #define CONFIG_PHY_SMSC
99 
100 #ifndef CONFIG_SPL
101 #define CONFIG_CMD_EEPROM
102 #define CONFIG_ENV_EEPROM_IS_ON_I2C
103 #define CONFIG_SYS_I2C_EEPROM_BUS             1
104 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN        1
105 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS     3
106 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
107 #endif
108 
109 /* Miscellaneous commands */
110 #define CONFIG_CMD_BMODE
111 
112 #define CONFIG_PREBOOT                 ""
113 
114 /* Print Buffer Size */
115 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
116 
117 /* Physical Memory Map */
118 #define CONFIG_NR_DRAM_BANKS           1
119 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
120 
121 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
122 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
123 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
124 
125 #define CONFIG_SYS_INIT_SP_OFFSET \
126 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
127 #define CONFIG_SYS_INIT_SP_ADDR \
128 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
129 
130 /* Environment organization */
131 #define CONFIG_ENV_IS_IN_SPI_FLASH
132 #define CONFIG_ENV_SIZE                 (64 * 1024)	/* 64 kb */
133 #define CONFIG_ENV_OFFSET               (1024 * 1024)
134 /* M25P16 has an erase size of 64 KiB */
135 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
136 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
137 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
138 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
139 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
140 
141 #define CONFIG_BOOTP_SERVERIP
142 #define CONFIG_BOOTP_BOOTFILE
143 
144 #endif         /* __CONFIG_H */
145