xref: /openbmc/u-boot/include/configs/ot1200.h (revision 52422e37)
1 /*
2  * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
3  * Copyright (C) 2014 Bachmann electronic GmbH
4  *
5  * SPDX-License-Identifier:     GPL-2.0+
6  */
7 
8 #ifndef __CONFIG_H
9 #define __CONFIG_H
10 
11 #include "mx6_common.h"
12 #define CONFIG_MX6
13 #define CONFIG_DISPLAY_CPUINFO
14 #define CONFIG_DISPLAY_BOARDINFO
15 
16 #include <asm/arch/imx-regs.h>
17 #include <asm/imx-common/gpio.h>
18 
19 #define CONFIG_CMDLINE_TAG
20 #define CONFIG_SETUP_MEMORY_TAGS
21 #define CONFIG_INITRD_TAG
22 #define CONFIG_REVISION_TAG
23 #define CONFIG_SYS_GENERIC_BOARD
24 
25 /* Size of malloc() pool */
26 #define CONFIG_SYS_MALLOC_LEN           (10 * 1024 * 1024)
27 
28 #define CONFIG_BOARD_EARLY_INIT_F
29 #define CONFIG_MISC_INIT_R
30 #define CONFIG_MXC_GPIO
31 
32 /* FUSE Configs */
33 #define CONFIG_CMD_FUSE
34 #define CONFIG_MXC_OCOTP
35 
36 /* UART Configs */
37 #define CONFIG_MXC_UART
38 #define CONFIG_MXC_UART_BASE           UART1_BASE
39 
40 /* SF Configs */
41 #define CONFIG_CMD_SF
42 #define CONFIG_SPI
43 #define CONFIG_SPI_FLASH
44 #define CONFIG_SPI_FLASH_STMICRO
45 #define CONFIG_SPI_FLASH_WINBOND
46 #define CONFIG_SPI_FLASH_MACRONIX
47 #define CONFIG_SPI_FLASH_SST
48 #define CONFIG_MXC_SPI
49 #define CONFIG_SF_DEFAULT_BUS  2
50 #define CONFIG_SF_DEFAULT_CS   (0|(IMX_GPIO_NR(1, 3)<<8))
51 #define CONFIG_SF_DEFAULT_SPEED 25000000
52 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
53 
54 /* IO expander */
55 #define CONFIG_PCA953X
56 #define CONFIG_SYS_I2C_PCA953X_ADDR	0x20
57 #define CONFIG_SYS_I2C_PCA953X_WIDTH	{ {0x20, 16} }
58 #define CONFIG_CMD_PCA953X
59 #define CONFIG_CMD_PCA953X_INFO
60 
61 /* I2C Configs */
62 #define CONFIG_CMD_I2C
63 #define CONFIG_SYS_I2C
64 #define CONFIG_SYS_I2C_MXC
65 #define CONFIG_SYS_I2C_SPEED            100000
66 
67 /* OCOTP Configs */
68 #define CONFIG_CMD_IMXOTP
69 #define CONFIG_IMX_OTP
70 #define IMX_OTP_BASE                    OCOTP_BASE_ADDR
71 #define IMX_OTP_ADDR_MAX                0x7F
72 #define IMX_OTP_DATA_ERROR_VAL          0xBADABADA
73 #define IMX_OTPWRITE_ENABLED
74 
75 /* MMC Configs */
76 #define CONFIG_FSL_ESDHC
77 #define CONFIG_FSL_USDHC
78 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
79 #define CONFIG_SYS_FSL_USDHC_NUM       2
80 
81 #define CONFIG_MMC
82 #define CONFIG_CMD_MMC
83 #define CONFIG_GENERIC_MMC
84 #define CONFIG_BOUNCE_BUFFER
85 
86 #ifdef CONFIG_MX6Q
87 #define CONFIG_CMD_SATA
88 #endif
89 
90 /*
91  * SATA Configs
92  */
93 #ifdef CONFIG_CMD_SATA
94 #define CONFIG_DWC_AHSATA
95 #define CONFIG_SYS_SATA_MAX_DEVICE	1
96 #define CONFIG_DWC_AHSATA_PORT_ID	0
97 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
98 #define CONFIG_LBA48
99 #define CONFIG_LIBATA
100 #endif
101 
102 
103 #define CONFIG_CMD_PING
104 #define CONFIG_CMD_DHCP
105 #define CONFIG_CMD_MII
106 #define CONFIG_CMD_NET
107 #define CONFIG_FEC_MXC
108 #define CONFIG_MII
109 #define IMX_FEC_BASE                    ENET_BASE_ADDR
110 #define CONFIG_FEC_XCV_TYPE             MII100
111 #define CONFIG_ETHPRIME                 "FEC"
112 #define CONFIG_FEC_MXC_PHYADDR          0x5
113 #define CONFIG_PHYLIB
114 #define CONFIG_PHY_SMSC
115 
116 /* Miscellaneous commands */
117 #define CONFIG_CMD_BMODE
118 #define CONFIG_CMD_SETEXPR
119 
120 /* allow to overwrite serial and ethaddr */
121 #define CONFIG_ENV_OVERWRITE
122 #define CONFIG_CONS_INDEX              1
123 #define CONFIG_BAUDRATE                115200
124 
125 /* Command definition */
126 #include <config_cmd_default.h>
127 
128 #undef CONFIG_CMD_IMLS
129 
130 #define CONFIG_BOOTDELAY               2
131 
132 #define CONFIG_PREBOOT                 ""
133 
134 #define CONFIG_LOADADDR                0x12000000
135 #define CONFIG_SYS_TEXT_BASE           0x17800000
136 
137 /* Miscellaneous configurable options */
138 #define CONFIG_SYS_LONGHELP
139 #define CONFIG_SYS_HUSH_PARSER
140 #define CONFIG_SYS_CBSIZE              1024
141 
142 /* Print Buffer Size */
143 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
144 #define CONFIG_SYS_MAXARGS             16
145 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
146 
147 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
148 
149 #define CONFIG_CMDLINE_EDITING
150 
151 /* Physical Memory Map */
152 #define CONFIG_NR_DRAM_BANKS           1
153 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
154 #define PHYS_SDRAM_SIZE                (1u * 1024 * 1024 * 1024)
155 
156 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
157 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
158 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
159 
160 #define CONFIG_SYS_INIT_SP_OFFSET \
161 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
162 #define CONFIG_SYS_INIT_SP_ADDR \
163 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
164 
165 /* FLASH and environment organization */
166 #define CONFIG_SYS_NO_FLASH
167 
168 #define CONFIG_ENV_IS_IN_SPI_FLASH
169 #define CONFIG_ENV_SIZE                 (64 * 1024)	/* 64 kb */
170 #define CONFIG_ENV_OFFSET               (1024 * 1024)
171 /* M25P16 has an erase size of 64 KiB */
172 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
173 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
174 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
175 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
176 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
177 
178 #define CONFIG_OF_LIBFDT
179 #define CONFIG_CMD_BOOTZ
180 
181 #ifndef CONFIG_SYS_DCACHE_OFF
182 #define CONFIG_CMD_CACHE
183 #endif
184 
185 #define CONFIG_CMD_BOOTZ
186 #define CONFIG_SUPPORT_RAW_INITRD
187 
188 /* FS Configs */
189 #define CONFIG_CMD_EXT3
190 #define CONFIG_CMD_EXT4
191 #define CONFIG_DOS_PARTITION
192 #define CONFIG_CMD_FS_GENERIC
193 
194 #define CONFIG_BOOTP_SERVERIP
195 #define CONFIG_BOOTP_BOOTFILE
196 
197 #endif         /* __CONFIG_H */
198