1 /* 2 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. 3 * Copyright (C) 2014 Bachmann electronic GmbH 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __CONFIG_H 9 #define __CONFIG_H 10 11 #include "mx6_common.h" 12 13 /* Size of malloc() pool */ 14 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 15 16 #define CONFIG_BOARD_EARLY_INIT_F 17 #define CONFIG_MISC_INIT_R 18 19 /* UART Configs */ 20 #define CONFIG_MXC_UART 21 #define CONFIG_MXC_UART_BASE UART1_BASE 22 23 /* SF Configs */ 24 #define CONFIG_CMD_SF 25 #define CONFIG_SPI 26 #define CONFIG_MXC_SPI 27 #define CONFIG_SF_DEFAULT_BUS 2 28 #define CONFIG_SF_DEFAULT_CS 0 29 #define CONFIG_SF_DEFAULT_SPEED 25000000 30 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 31 32 /* IO expander */ 33 #define CONFIG_PCA953X 34 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x20 35 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } 36 #define CONFIG_CMD_PCA953X 37 #define CONFIG_CMD_PCA953X_INFO 38 39 /* I2C Configs */ 40 #define CONFIG_CMD_I2C 41 #define CONFIG_SYS_I2C 42 #define CONFIG_SYS_I2C_MXC 43 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 44 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 45 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 46 #define CONFIG_SYS_I2C_SPEED 100000 47 48 /* OCOTP Configs */ 49 #define CONFIG_CMD_IMXOTP 50 #define CONFIG_IMX_OTP 51 #define IMX_OTP_BASE OCOTP_BASE_ADDR 52 #define IMX_OTP_ADDR_MAX 0x7F 53 #define IMX_OTP_DATA_ERROR_VAL 0xBADABADA 54 #define IMX_OTPWRITE_ENABLED 55 56 /* MMC Configs */ 57 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 58 #define CONFIG_SYS_FSL_USDHC_NUM 2 59 60 /* USB Configs */ 61 #define CONFIG_CMD_USB 62 #define CONFIG_USB_STORAGE 63 #define CONFIG_USB_EHCI 64 #define CONFIG_USB_EHCI_MX6 65 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 66 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 67 68 #ifdef CONFIG_MX6Q 69 #define CONFIG_CMD_SATA 70 #endif 71 72 /* 73 * SATA Configs 74 */ 75 #ifdef CONFIG_CMD_SATA 76 #define CONFIG_DWC_AHSATA 77 #define CONFIG_SYS_SATA_MAX_DEVICE 1 78 #define CONFIG_DWC_AHSATA_PORT_ID 0 79 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 80 #define CONFIG_LBA48 81 #define CONFIG_LIBATA 82 #endif 83 84 85 /* SPL */ 86 #ifdef CONFIG_SPL 87 #include "imx6_spl.h" 88 #define CONFIG_SPL_SPI_SUPPORT 89 #define CONFIG_SPL_LIBCOMMON_SUPPORT 90 #define CONFIG_SPL_SPI_FLASH_SUPPORT 91 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 92 #define CONFIG_SPL_SPI_LOAD 93 #endif 94 95 #define CONFIG_CMD_PING 96 #define CONFIG_CMD_DHCP 97 #define CONFIG_CMD_MII 98 #define CONFIG_FEC_MXC 99 #define CONFIG_MII 100 #define IMX_FEC_BASE ENET_BASE_ADDR 101 #define CONFIG_FEC_XCV_TYPE MII100 102 #define CONFIG_ETHPRIME "FEC" 103 #define CONFIG_FEC_MXC_PHYADDR 0x5 104 #define CONFIG_PHYLIB 105 #define CONFIG_PHY_SMSC 106 107 #ifndef CONFIG_SPL 108 #define CONFIG_CMD_EEPROM 109 #define CONFIG_ENV_EEPROM_IS_ON_I2C 110 #define CONFIG_SYS_I2C_EEPROM_BUS 1 111 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 112 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 113 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 114 #endif 115 116 /* Miscellaneous commands */ 117 #define CONFIG_CMD_BMODE 118 119 #define CONFIG_PREBOOT "" 120 121 /* Print Buffer Size */ 122 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 123 124 /* Physical Memory Map */ 125 #define CONFIG_NR_DRAM_BANKS 1 126 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 127 128 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 129 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 130 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 131 132 #define CONFIG_SYS_INIT_SP_OFFSET \ 133 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 134 #define CONFIG_SYS_INIT_SP_ADDR \ 135 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 136 137 /* Environment organization */ 138 #define CONFIG_ENV_IS_IN_SPI_FLASH 139 #define CONFIG_ENV_SIZE (64 * 1024) /* 64 kb */ 140 #define CONFIG_ENV_OFFSET (1024 * 1024) 141 /* M25P16 has an erase size of 64 KiB */ 142 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 143 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 144 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 145 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 146 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 147 148 #define CONFIG_BOOTP_SERVERIP 149 #define CONFIG_BOOTP_BOOTFILE 150 151 #endif /* __CONFIG_H */ 152