xref: /openbmc/u-boot/include/configs/origen.h (revision ac45bb16)
1 /*
2  * Copyright (C) 2011 Samsung Electronics
3  *
4  * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 /* High Level Configuration Options */
13 #define CONFIG_SAMSUNG			1	/* SAMSUNG core */
14 #define CONFIG_S5P			1	/* S5P Family */
15 #define CONFIG_EXYNOS4210		1	/* which is a EXYNOS4210 SoC */
16 #define CONFIG_ORIGEN			1	/* working with ORIGEN*/
17 
18 #include <asm/arch/cpu.h>		/* get chip and board defs */
19 
20 #define CONFIG_ARCH_CPU_INIT
21 #define CONFIG_DISPLAY_CPUINFO
22 #define CONFIG_DISPLAY_BOARDINFO
23 #define CONFIG_BOARD_EARLY_INIT_F
24 
25 /* Keep L2 Cache Disabled */
26 #define CONFIG_L2_OFF			1
27 #define CONFIG_SYS_DCACHE_OFF		1
28 
29 #define CONFIG_SYS_SDRAM_BASE		0x40000000
30 #define CONFIG_SYS_TEXT_BASE		0x43E00000
31 
32 /* input clock of PLL: ORIGEN has 24MHz input clock */
33 #define CONFIG_SYS_CLK_FREQ		24000000
34 
35 #define CONFIG_SETUP_MEMORY_TAGS
36 #define CONFIG_CMDLINE_TAG
37 #define CONFIG_INITRD_TAG
38 #define CONFIG_CMDLINE_EDITING
39 
40 #define CONFIG_MACH_TYPE		MACH_TYPE_ORIGEN
41 
42 /* Power Down Modes */
43 #define S5P_CHECK_SLEEP			0x00000BAD
44 #define S5P_CHECK_DIDLE			0xBAD00000
45 #define S5P_CHECK_LPA			0xABAD0000
46 
47 /* Size of malloc() pool */
48 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (1 << 20))
49 
50 /* select serial console configuration */
51 #define CONFIG_SERIAL2			1	/* use SERIAL 2 */
52 #define CONFIG_BAUDRATE			115200
53 #define EXYNOS4_DEFAULT_UART_OFFSET	0x020000
54 
55 #define CONFIG_SKIP_LOWLEVEL_INIT
56 
57 /* SD/MMC configuration */
58 #define CONFIG_GENERIC_MMC
59 #define CONFIG_MMC
60 #define CONFIG_SDHCI
61 #define CONFIG_S5P_SDHCI
62 
63 /* PWM */
64 #define CONFIG_PWM			1
65 
66 /* allow to overwrite serial and ethaddr */
67 #define CONFIG_ENV_OVERWRITE
68 
69 /* Command definition*/
70 #include <config_cmd_default.h>
71 
72 #undef CONFIG_CMD_PING
73 #define CONFIG_CMD_ELF
74 #define CONFIG_CMD_DHCP
75 #define CONFIG_CMD_MMC
76 #define CONFIG_CMD_FAT
77 #undef CONFIG_CMD_NET
78 #undef CONFIG_CMD_NFS
79 
80 #define CONFIG_BOOTDELAY		3
81 #define CONFIG_ZERO_BOOTDELAY_CHECK
82 /* MMC SPL */
83 #define CONFIG_SPL
84 #define COPY_BL2_FNPTR_ADDR	0x02020030
85 
86 #define CONFIG_SPL_TEXT_BASE	0x02021410
87 
88 #define CONFIG_BOOTCOMMAND	"fatload mmc 0 40007000 uImage; bootm 40007000"
89 
90 /* Miscellaneous configurable options */
91 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
92 #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser	*/
93 #define CONFIG_SYS_PROMPT		"ORIGEN # "
94 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size*/
95 #define CONFIG_SYS_PBSIZE		384	/* Print Buffer Size */
96 #define CONFIG_SYS_MAXARGS		16	/* max number of command args */
97 #define CONFIG_DEFAULT_CONSOLE		"console=ttySAC2,115200n8\0"
98 /* Boot Argument Buffer Size */
99 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
100 /* memtest works on */
101 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
102 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x6000000)
103 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x3E00000)
104 
105 /* ORIGEN has 4 bank of DRAM */
106 #define CONFIG_NR_DRAM_BANKS	4
107 #define SDRAM_BANK_SIZE		(256UL << 20UL)	/* 256 MB */
108 #define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE
109 #define PHYS_SDRAM_1_SIZE	SDRAM_BANK_SIZE
110 #define PHYS_SDRAM_2		(CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
111 #define PHYS_SDRAM_2_SIZE	SDRAM_BANK_SIZE
112 #define PHYS_SDRAM_3		(CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
113 #define PHYS_SDRAM_3_SIZE	SDRAM_BANK_SIZE
114 #define PHYS_SDRAM_4		(CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
115 #define PHYS_SDRAM_4_SIZE	SDRAM_BANK_SIZE
116 
117 /* FLASH and environment organization */
118 #define CONFIG_SYS_NO_FLASH		1
119 #undef CONFIG_CMD_IMLS
120 #define CONFIG_IDENT_STRING		" for ORIGEN"
121 
122 #define CONFIG_CLK_1000_400_200
123 
124 /* MIU (Memory Interleaving Unit) */
125 #define CONFIG_MIU_2BIT_21_7_INTERLEAVED
126 
127 #define CONFIG_ENV_IS_IN_MMC		1
128 #define CONFIG_SYS_MMC_ENV_DEV		0
129 #define CONFIG_ENV_SIZE			(16 << 10)	/* 16 KB */
130 #define RESERVE_BLOCK_SIZE		(512)
131 #define BL1_SIZE			(16 << 10) /*16 K reserved for BL1*/
132 #define CONFIG_ENV_OFFSET		(RESERVE_BLOCK_SIZE + BL1_SIZE)
133 #define CONFIG_DOS_PARTITION		1
134 
135 #define CONFIG_SPL_LDSCRIPT	"board/samsung/common/exynos-uboot-spl.lds"
136 #define CONFIG_SPL_MAX_FOOTPRINT	(14 * 1024)
137 
138 #define CONFIG_SYS_INIT_SP_ADDR		0x02040000
139 
140 /* U-boot copy size from boot Media to DRAM.*/
141 #define COPY_BL2_SIZE		0x80000
142 #define BL2_START_OFFSET	((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
143 #define BL2_SIZE_BLOC_COUNT	(COPY_BL2_SIZE/512)
144 
145 /* Enable devicetree support */
146 #define CONFIG_OF_LIBFDT
147 
148 #endif	/* __CONFIG_H */
149