1 /* 2 * Copyright (C) 2011 Samsung Electronics 3 * 4 * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 /* High Level Configuration Options */ 13 #define CONFIG_SAMSUNG 1 /* SAMSUNG core */ 14 #define CONFIG_S5P 1 /* S5P Family */ 15 #define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ 16 #define CONFIG_ORIGEN 1 /* working with ORIGEN*/ 17 18 #include <asm/arch/cpu.h> /* get chip and board defs */ 19 20 #define CONFIG_ARCH_CPU_INIT 21 #define CONFIG_DISPLAY_CPUINFO 22 #define CONFIG_DISPLAY_BOARDINFO 23 #define CONFIG_BOARD_EARLY_INIT_F 24 25 #define CONFIG_SYS_DCACHE_OFF 1 26 27 #define CONFIG_SYS_SDRAM_BASE 0x40000000 28 #define CONFIG_SYS_TEXT_BASE 0x43E00000 29 30 /* input clock of PLL: ORIGEN has 24MHz input clock */ 31 #define CONFIG_SYS_CLK_FREQ 24000000 32 33 #define CONFIG_SETUP_MEMORY_TAGS 34 #define CONFIG_CMDLINE_TAG 35 #define CONFIG_INITRD_TAG 36 #define CONFIG_CMDLINE_EDITING 37 38 #define CONFIG_MACH_TYPE MACH_TYPE_ORIGEN 39 40 /* Power Down Modes */ 41 #define S5P_CHECK_SLEEP 0x00000BAD 42 #define S5P_CHECK_DIDLE 0xBAD00000 43 #define S5P_CHECK_LPA 0xABAD0000 44 45 /* Size of malloc() pool */ 46 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) 47 48 /* select serial console configuration */ 49 #define CONFIG_SERIAL2 1 /* use SERIAL 2 */ 50 #define CONFIG_BAUDRATE 115200 51 #define EXYNOS4_DEFAULT_UART_OFFSET 0x020000 52 53 #define CONFIG_SKIP_LOWLEVEL_INIT 54 55 /* SD/MMC configuration */ 56 #define CONFIG_GENERIC_MMC 57 #define CONFIG_MMC 58 #define CONFIG_SDHCI 59 #define CONFIG_S5P_SDHCI 60 61 /* PWM */ 62 #define CONFIG_PWM 1 63 64 /* allow to overwrite serial and ethaddr */ 65 #define CONFIG_ENV_OVERWRITE 66 67 /* Command definition*/ 68 #include <config_cmd_default.h> 69 70 #undef CONFIG_CMD_PING 71 #define CONFIG_CMD_ELF 72 #define CONFIG_CMD_DHCP 73 #define CONFIG_CMD_MMC 74 #define CONFIG_CMD_FAT 75 #undef CONFIG_CMD_NET 76 #undef CONFIG_CMD_NFS 77 78 #define CONFIG_BOOTDELAY 3 79 #define CONFIG_ZERO_BOOTDELAY_CHECK 80 /* MMC SPL */ 81 #define CONFIG_SPL 82 #define COPY_BL2_FNPTR_ADDR 0x02020030 83 84 #define CONFIG_SPL_TEXT_BASE 0x02021410 85 86 #define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000" 87 88 /* Miscellaneous configurable options */ 89 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 90 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 91 #define CONFIG_SYS_PROMPT "ORIGEN # " 92 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/ 93 #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ 94 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 95 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" 96 /* Boot Argument Buffer Size */ 97 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 98 /* memtest works on */ 99 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 100 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000) 101 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) 102 103 /* ORIGEN has 4 bank of DRAM */ 104 #define CONFIG_NR_DRAM_BANKS 4 105 #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ 106 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE 107 #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE 108 #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) 109 #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE 110 #define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) 111 #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE 112 #define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) 113 #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE 114 115 /* FLASH and environment organization */ 116 #define CONFIG_SYS_NO_FLASH 1 117 #undef CONFIG_CMD_IMLS 118 #define CONFIG_IDENT_STRING " for ORIGEN" 119 120 #define CONFIG_CLK_1000_400_200 121 122 /* MIU (Memory Interleaving Unit) */ 123 #define CONFIG_MIU_2BIT_21_7_INTERLEAVED 124 125 #define CONFIG_ENV_IS_IN_MMC 1 126 #define CONFIG_SYS_MMC_ENV_DEV 0 127 #define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */ 128 #define RESERVE_BLOCK_SIZE (512) 129 #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ 130 #define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE) 131 #define CONFIG_DOS_PARTITION 1 132 133 #define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds" 134 #define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) 135 136 #define CONFIG_SYS_INIT_SP_ADDR 0x02040000 137 138 /* U-boot copy size from boot Media to DRAM.*/ 139 #define COPY_BL2_SIZE 0x80000 140 #define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512) 141 #define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512) 142 143 /* Enable devicetree support */ 144 #define CONFIG_OF_LIBFDT 145 146 #endif /* __CONFIG_H */ 147