xref: /openbmc/u-boot/include/configs/origen.h (revision bf7716d6)
1b9a1ef21SChander Kashyap /*
2b9a1ef21SChander Kashyap  * Copyright (C) 2011 Samsung Electronics
3b9a1ef21SChander Kashyap  *
4393cb361SChander Kashyap  * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board.
5b9a1ef21SChander Kashyap  *
61a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
7b9a1ef21SChander Kashyap  */
8b9a1ef21SChander Kashyap 
9*bf7716d6SPiotr Wilczek #ifndef __CONFIG_ORIGEN_H
10*bf7716d6SPiotr Wilczek #define __CONFIG_ORIGEN_H
11*bf7716d6SPiotr Wilczek 
12*bf7716d6SPiotr Wilczek #include <configs/exynos4-dt.h>
13*bf7716d6SPiotr Wilczek 
14*bf7716d6SPiotr Wilczek #define CONFIG_SYS_PROMPT		"ORIGEN # "
15*bf7716d6SPiotr Wilczek 
16*bf7716d6SPiotr Wilczek #undef CONFIG_DEFAULT_DEVICE_TREE
17*bf7716d6SPiotr Wilczek #define CONFIG_DEFAULT_DEVICE_TREE	exynos4210-origen
18b9a1ef21SChander Kashyap 
19b9a1ef21SChander Kashyap /* High Level Configuration Options */
20393cb361SChander Kashyap #define CONFIG_EXYNOS4210		1	/* which is a EXYNOS4210 SoC */
21b9a1ef21SChander Kashyap #define CONFIG_ORIGEN			1	/* working with ORIGEN*/
22b9a1ef21SChander Kashyap 
23b9a1ef21SChander Kashyap #define CONFIG_SYS_DCACHE_OFF		1
24b9a1ef21SChander Kashyap 
25*bf7716d6SPiotr Wilczek /* ORIGEN has 4 bank of DRAM */
26*bf7716d6SPiotr Wilczek #define CONFIG_NR_DRAM_BANKS		4
27b9a1ef21SChander Kashyap #define CONFIG_SYS_SDRAM_BASE		0x40000000
28*bf7716d6SPiotr Wilczek #define PHYS_SDRAM_1			CONFIG_SYS_SDRAM_BASE
29*bf7716d6SPiotr Wilczek #define SDRAM_BANK_SIZE			(256 << 20)	/* 256 MB */
30*bf7716d6SPiotr Wilczek 
31*bf7716d6SPiotr Wilczek /* memtest works on */
32*bf7716d6SPiotr Wilczek #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
33*bf7716d6SPiotr Wilczek #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x6000000)
34*bf7716d6SPiotr Wilczek #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x3E00000)
35*bf7716d6SPiotr Wilczek 
36b9a1ef21SChander Kashyap #define CONFIG_SYS_TEXT_BASE		0x43E00000
37b9a1ef21SChander Kashyap 
38b9a1ef21SChander Kashyap #define CONFIG_MACH_TYPE		MACH_TYPE_ORIGEN
39b9a1ef21SChander Kashyap 
40*bf7716d6SPiotr Wilczek /* Size of malloc() pool */
41*bf7716d6SPiotr Wilczek #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (80 * SZ_1M))
42*bf7716d6SPiotr Wilczek 
43*bf7716d6SPiotr Wilczek /* select serial console configuration */
44*bf7716d6SPiotr Wilczek #define CONFIG_SERIAL2
45*bf7716d6SPiotr Wilczek #define CONFIG_BAUDRATE			115200
46*bf7716d6SPiotr Wilczek 
47*bf7716d6SPiotr Wilczek /* Console configuration */
48*bf7716d6SPiotr Wilczek #define CONFIG_SYS_CONSOLE_INFO_QUIET
49*bf7716d6SPiotr Wilczek #define CONFIG_SYS_CONSOLE_IS_IN_ENV
50*bf7716d6SPiotr Wilczek #define CONFIG_DEFAULT_CONSOLE		"console=ttySAC1,115200n8\0"
51*bf7716d6SPiotr Wilczek 
52*bf7716d6SPiotr Wilczek #define CONFIG_SYS_MEM_TOP_HIDE	(1 << 20)	/* ram console */
53*bf7716d6SPiotr Wilczek 
54*bf7716d6SPiotr Wilczek #define CONFIG_SYS_MONITOR_BASE	0x00000000
55*bf7716d6SPiotr Wilczek 
56b9a1ef21SChander Kashyap /* Power Down Modes */
57b9a1ef21SChander Kashyap #define S5P_CHECK_SLEEP			0x00000BAD
58b9a1ef21SChander Kashyap #define S5P_CHECK_DIDLE			0xBAD00000
59b9a1ef21SChander Kashyap #define S5P_CHECK_LPA			0xABAD0000
60b9a1ef21SChander Kashyap 
6180615006SJoe Hershberger #undef CONFIG_CMD_PING
62b9a1ef21SChander Kashyap #define CONFIG_CMD_ELF
63b9a1ef21SChander Kashyap #define CONFIG_CMD_DHCP
64b9a1ef21SChander Kashyap #undef CONFIG_CMD_NET
65b9a1ef21SChander Kashyap #undef CONFIG_CMD_NFS
66b9a1ef21SChander Kashyap 
6798a48c5dSChander Kashyap /* MMC SPL */
6898a48c5dSChander Kashyap #define CONFIG_SPL
6998a48c5dSChander Kashyap #define COPY_BL2_FNPTR_ADDR	0x02020030
708a00061eSInderpal Singh #define CONFIG_SPL_TEXT_BASE	0x02021410
718a00061eSInderpal Singh 
72b9a1ef21SChander Kashyap #define CONFIG_BOOTCOMMAND	"fatload mmc 0 40007000 uImage; bootm 40007000"
73b9a1ef21SChander Kashyap 
74b9a1ef21SChander Kashyap #define CONFIG_IDENT_STRING		" for ORIGEN"
75b9a1ef21SChander Kashyap 
76b9a1ef21SChander Kashyap #define CONFIG_CLK_1000_400_200
77b9a1ef21SChander Kashyap 
78b9a1ef21SChander Kashyap /* MIU (Memory Interleaving Unit) */
79b9a1ef21SChander Kashyap #define CONFIG_MIU_2BIT_21_7_INTERLEAVED
80b9a1ef21SChander Kashyap 
81*bf7716d6SPiotr Wilczek #define CONFIG_ENV_IS_IN_MMC
82b9a1ef21SChander Kashyap #define CONFIG_SYS_MMC_ENV_DEV		0
83b9a1ef21SChander Kashyap #define CONFIG_ENV_SIZE			(16 << 10)	/* 16 KB */
84b9a1ef21SChander Kashyap #define RESERVE_BLOCK_SIZE		(512)
85b9a1ef21SChander Kashyap #define BL1_SIZE			(16 << 10) /*16 K reserved for BL1*/
86b9a1ef21SChander Kashyap #define CONFIG_ENV_OFFSET		(RESERVE_BLOCK_SIZE + BL1_SIZE)
87b9a1ef21SChander Kashyap 
88643be9c0SRajeshwari Shinde #define CONFIG_SPL_LDSCRIPT	"board/samsung/common/exynos-uboot-spl.lds"
89643be9c0SRajeshwari Shinde #define CONFIG_SPL_MAX_FOOTPRINT	(14 * 1024)
90643be9c0SRajeshwari Shinde 
91643be9c0SRajeshwari Shinde #define CONFIG_SYS_INIT_SP_ADDR		0x02040000
9298a48c5dSChander Kashyap 
9398a48c5dSChander Kashyap /* U-boot copy size from boot Media to DRAM.*/
9498a48c5dSChander Kashyap #define COPY_BL2_SIZE		0x80000
9598a48c5dSChander Kashyap #define BL2_START_OFFSET	((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
9698a48c5dSChander Kashyap #define BL2_SIZE_BLOC_COUNT	(COPY_BL2_SIZE/512)
97099e884aSAngus Ainslie 
98b9a1ef21SChander Kashyap #endif	/* __CONFIG_H */
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