1 /* 2 * (C) Copyright 2010 3 * Texas Instruments Incorporated. 4 * Aneesh V <aneesh@ti.com> 5 * Steve Sakoman <steve@sakoman.com> 6 * 7 * Configuration settings for the TI SDP4430 board. 8 * 9 * See file CREDITS for list of people who contributed to this 10 * project. 11 * 12 * This program is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License as 14 * published by the Free Software Foundation; either version 2 of 15 * the License, or (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 25 * MA 02111-1307 USA 26 */ 27 28 #ifndef __CONFIG_H 29 #define __CONFIG_H 30 31 /* 32 * High Level Configuration Options 33 */ 34 #define CONFIG_OMAP 1 /* in a TI OMAP core */ 35 #define CONFIG_OMAP44XX 1 /* which is a 44XX */ 36 #define CONFIG_OMAP4430 1 /* which is in a 4430 */ 37 #define CONFIG_4430SDP 1 /* working with SDP */ 38 #define CONFIG_ARCH_CPU_INIT 39 40 /* Get CPU defs */ 41 #include <asm/arch/cpu.h> 42 #include <asm/arch/omap4.h> 43 44 /* Display CPU and Board Info */ 45 #define CONFIG_DISPLAY_CPUINFO 1 46 #define CONFIG_DISPLAY_BOARDINFO 1 47 48 /* Clock Defines */ 49 #define V_OSCK 38400000 /* Clock output from T2 */ 50 #define V_SCLK V_OSCK 51 52 #undef CONFIG_USE_IRQ /* no support for IRQs */ 53 #define CONFIG_MISC_INIT_R 54 55 #define CONFIG_OF_LIBFDT 1 56 57 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 58 #define CONFIG_SETUP_MEMORY_TAGS 1 59 #define CONFIG_INITRD_TAG 1 60 #define CONFIG_REVISION_TAG 1 61 62 /* 63 * Size of malloc() pool 64 * Total Size Environment - 128k 65 * Malloc - add 256k 66 */ 67 #define CONFIG_ENV_SIZE (128 << 10) 68 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10)) 69 /* Vector Base */ 70 #define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE 71 72 /* 73 * Hardware drivers 74 */ 75 76 /* 77 * serial port - NS16550 compatible 78 */ 79 #define V_NS16550_CLK 48000000 80 81 #define CONFIG_SYS_NS16550 82 #define CONFIG_SYS_NS16550_SERIAL 83 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 84 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 85 #define CONFIG_CONS_INDEX 3 86 #define CONFIG_SYS_NS16550_COM3 UART3_BASE 87 88 #define CONFIG_BAUDRATE 115200 89 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 90 115200} 91 /* I2C */ 92 #define CONFIG_HARD_I2C 1 93 #define CONFIG_SYS_I2C_SPEED 100000 94 #define CONFIG_SYS_I2C_SLAVE 1 95 #define CONFIG_SYS_I2C_BUS 0 96 #define CONFIG_SYS_I2C_BUS_SELECT 1 97 #define CONFIG_DRIVER_OMAP34XX_I2C 1 98 #define CONFIG_I2C_MULTI_BUS 1 99 100 /* TWL6030 */ 101 #define CONFIG_TWL6030_POWER 1 102 #define CONFIG_CMD_BAT 1 103 104 /* MMC */ 105 #define CONFIG_GENERIC_MMC 1 106 #define CONFIG_MMC 1 107 #define CONFIG_OMAP_HSMMC 1 108 #define CONFIG_SYS_MMC_SET_DEV 1 109 #define CONFIG_DOS_PARTITION 1 110 111 /* MMC ENV related defines */ 112 #define CONFIG_ENV_IS_IN_MMC 1 113 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ 114 #define CONFIG_ENV_OFFSET 0xE0000 115 116 /* USB */ 117 #define CONFIG_MUSB_UDC 1 118 #define CONFIG_USB_OMAP3 1 119 120 /* USB device configuration */ 121 #define CONFIG_USB_DEVICE 1 122 #define CONFIG_USB_TTY 1 123 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 124 125 /* Flash */ 126 #define CONFIG_SYS_NO_FLASH 1 127 128 /* commands to include */ 129 #include <config_cmd_default.h> 130 131 /* Enabled commands */ 132 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 133 #define CONFIG_CMD_FAT /* FAT support */ 134 #define CONFIG_CMD_I2C /* I2C serial bus support */ 135 #define CONFIG_CMD_MMC /* MMC support */ 136 #define CONFIG_CMD_SAVEENV 137 138 /* Disabled commands */ 139 #undef CONFIG_CMD_NET 140 #undef CONFIG_CMD_NFS 141 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 142 #undef CONFIG_CMD_IMLS /* List all found images */ 143 144 /* 145 * Environment setup 146 */ 147 148 #define CONFIG_BOOTDELAY 3 149 150 #define CONFIG_ENV_OVERWRITE 151 152 #define CONFIG_EXTRA_ENV_SETTINGS \ 153 "loadaddr=0x82000000\0" \ 154 "console=ttyS2,115200n8\0" \ 155 "usbtty=cdc_acm\0" \ 156 "vram=16M\0" \ 157 "mmcdev=0\0" \ 158 "mmcroot=/dev/mmcblk0p2 rw\0" \ 159 "mmcrootfstype=ext3 rootwait\0" \ 160 "mmcargs=setenv bootargs console=${console} " \ 161 "vram=${vram} " \ 162 "root=${mmcroot} " \ 163 "rootfstype=${mmcrootfstype}\0" \ 164 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 165 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ 166 "source ${loadaddr}\0" \ 167 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 168 "mmcboot=echo Booting from mmc${mmcdev} ...; " \ 169 "run mmcargs; " \ 170 "bootm ${loadaddr}\0" \ 171 172 #define CONFIG_BOOTCOMMAND \ 173 "if mmc rescan ${mmcdev}; then " \ 174 "if run loadbootscript; then " \ 175 "run bootscript; " \ 176 "else " \ 177 "if run loaduimage; then " \ 178 "run mmcboot; " \ 179 "fi; " \ 180 "fi; " \ 181 "fi" 182 183 #define CONFIG_AUTO_COMPLETE 1 184 185 /* 186 * Miscellaneous configurable options 187 */ 188 189 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 190 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 191 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 192 #define CONFIG_SYS_PROMPT "OMAP4430 SDP # " 193 #define CONFIG_SYS_CBSIZE 256 194 /* Print Buffer Size */ 195 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 196 sizeof(CONFIG_SYS_PROMPT) + 16) 197 #define CONFIG_SYS_MAXARGS 16 198 /* Boot Argument Buffer Size */ 199 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 200 201 /* 202 * memtest setup 203 */ 204 #define CONFIG_SYS_MEMTEST_START 0x80000000 205 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20)) 206 207 /* Default load address */ 208 #define CONFIG_SYS_LOAD_ADDR 0x80000000 209 210 /* Use General purpose timer 1 */ 211 #define CONFIG_SYS_TIMERBASE GPT2_BASE 212 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 213 #define CONFIG_SYS_HZ 1000 214 215 /* 216 * Stack sizes 217 * 218 * The stack sizes are set up in start.S using the settings below 219 */ 220 #define CONFIG_STACKSIZE (128 << 10) /* Regular stack */ 221 #ifdef CONFIG_USE_IRQ 222 #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack */ 223 #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */ 224 #endif 225 226 /* 227 * SDRAM Memory Map 228 * Even though we use two CS all the memory 229 * is mapped to one contiguous block 230 */ 231 #define CONFIG_NR_DRAM_BANKS 1 232 233 #define CONFIG_SYS_SDRAM_BASE 0x80000000 234 #define CONFIG_SYS_INIT_RAM_ADDR 0x4030D800 235 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 236 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 237 CONFIG_SYS_INIT_RAM_SIZE - \ 238 GENERATED_GBL_DATA_SIZE) 239 240 #ifndef CONFIG_SYS_L2CACHE_OFF 241 #define CONFIG_SYS_L2_PL310 1 242 #define CONFIG_SYS_PL310_BASE 0x48242000 243 #endif 244 245 /* Defines for SDRAM init */ 246 #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS 247 #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION 248 #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS 249 #endif 250 251 /* Defines for SPL */ 252 #define CONFIG_SPL 253 #define CONFIG_SPL_TEXT_BASE 0x40304350 254 #define CONFIG_SPL_MAX_SIZE 0x8000 /* 32 K */ 255 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 256 257 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 258 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 259 260 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 261 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 262 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 263 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 264 265 #define CONFIG_SPL_LIBCOMMON_SUPPORT 266 #define CONFIG_SPL_LIBDISK_SUPPORT 267 #define CONFIG_SPL_I2C_SUPPORT 268 #define CONFIG_SPL_MMC_SUPPORT 269 #define CONFIG_SPL_FAT_SUPPORT 270 #define CONFIG_SPL_LIBGENERIC_SUPPORT 271 #define CONFIG_SPL_SERIAL_SUPPORT 272 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/omap-common/u-boot-spl.lds" 273 274 /* 275 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 276 * 64 bytes before this address should be set aside for u-boot.img's 277 * header. That is 0x800FFFC0--0x80100000 should not be used for any 278 * other needs. 279 */ 280 #define CONFIG_SYS_TEXT_BASE 0x80100000 281 282 #endif /* __CONFIG_H */ 283