xref: /openbmc/u-boot/include/configs/omap4_sdp4430.h (revision cdb749778aa3a8f8d2a41dd4ad811ef822aecfe6)
1 /*
2  * (C) Copyright 2010
3  * Texas Instruments Incorporated.
4  * Aneesh V       <aneesh@ti.com>
5  * Steve Sakoman  <steve@sakoman.com>
6  *
7  * Configuration settings for the TI SDP4430 board.
8  *
9  * See file CREDITS for list of people who contributed to this
10  * project.
11  *
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License as
14  * published by the Free Software Foundation; either version 2 of
15  * the License, or (at your option) any later version.
16  *
17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
20  * GNU General Public License for more details.
21  *
22  * You should have received a copy of the GNU General Public License
23  * along with this program; if not, write to the Free Software
24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25  * MA 02111-1307 USA
26  */
27 
28 #ifndef __CONFIG_H
29 #define __CONFIG_H
30 
31 /*
32  * High Level Configuration Options
33  */
34 #define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
35 #define CONFIG_OMAP		1	/* in a TI OMAP core */
36 #define CONFIG_OMAP44XX		1	/* which is a 44XX */
37 #define CONFIG_OMAP4430		1	/* which is in a 4430 */
38 #define CONFIG_4430SDP		1	/* working with SDP */
39 
40 /* Get CPU defs */
41 #include <asm/arch/cpu.h>
42 #include <asm/arch/omap4.h>
43 
44 /* Display CPU and Board Info */
45 #define CONFIG_DISPLAY_CPUINFO		1
46 #define CONFIG_DISPLAY_BOARDINFO	1
47 
48 /* Keep L2 Cache Disabled */
49 #define CONFIG_L2_OFF			1
50 
51 /* Clock Defines */
52 #define V_OSCK			38400000	/* Clock output from T2 */
53 #define V_SCLK                   V_OSCK
54 
55 #undef CONFIG_USE_IRQ				/* no support for IRQs */
56 #define CONFIG_MISC_INIT_R
57 
58 #define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
59 #define CONFIG_SETUP_MEMORY_TAGS	1
60 #define CONFIG_INITRD_TAG		1
61 #define CONFIG_REVISION_TAG		1
62 
63 /*
64  * Size of malloc() pool
65  * Total Size Environment - 256k
66  * Malloc - add 256k
67  */
68 #define CONFIG_ENV_SIZE			(256 << 10)
69 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (256 << 10))
70 #define CONFIG_SYS_GBL_DATA_SIZE	128	/* bytes reserved for */
71 						/* initial data */
72 /* Vector Base */
73 #define CONFIG_SYS_CA9_VECTOR_BASE	SRAM_ROM_VECT_BASE
74 
75 /*
76  * Hardware drivers
77  */
78 
79 /*
80  * serial port - NS16550 compatible
81  */
82 #define V_NS16550_CLK			48000000
83 
84 #define CONFIG_SYS_NS16550
85 #define CONFIG_SYS_NS16550_SERIAL
86 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
87 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
88 #define CONFIG_CONS_INDEX		3
89 #define CONFIG_SYS_NS16550_COM3		UART3_BASE
90 
91 #define CONFIG_ENV_IS_NOWHERE
92 #define CONFIG_ENV_OVERWRITE
93 #define CONFIG_BAUDRATE			115200
94 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
95 					115200}
96 
97 /* I2C  */
98 #define CONFIG_HARD_I2C			1
99 #define CONFIG_SYS_I2C_SPEED		100000
100 #define CONFIG_SYS_I2C_SLAVE		1
101 #define CONFIG_SYS_I2C_BUS		0
102 #define CONFIG_SYS_I2C_BUS_SELECT	1
103 #define CONFIG_DRIVER_OMAP34XX_I2C	1
104 #define CONFIG_I2C_MULTI_BUS		1
105 
106 /* MMC */
107 #define CONFIG_MMC			1
108 #define CONFIG_OMAP3_MMC		1
109 #define CONFIG_SYS_MMC_SET_DEV		1
110 #define CONFIG_DOS_PARTITION		1
111 
112 /* Flash */
113 #define CONFIG_SYS_NO_FLASH	1
114 
115 /* commands to include */
116 #include <config_cmd_default.h>
117 
118 /* Enabled commands */
119 #define CONFIG_CMD_EXT2		/* EXT2 Support                 */
120 #define CONFIG_CMD_FAT		/* FAT support                  */
121 #define CONFIG_CMD_I2C		/* I2C serial bus support	*/
122 #define CONFIG_CMD_MMC		/* MMC support                  */
123 
124 /* Disabled commands */
125 #undef CONFIG_CMD_NET
126 #undef CONFIG_CMD_FPGA		/* FPGA configuration Support   */
127 #undef CONFIG_CMD_IMLS		/* List all found images        */
128 
129 /*
130  * Enabling relocation of u-boot by default
131  * Relocation can be skipped if u-boot is copied to the TEXT_BASE
132  */
133 #undef CONFIG_SKIP_RELOCATE_UBOOT
134 
135 /*
136  * Environment setup
137  */
138 
139 /* allow overwriting serial config and ethaddr */
140 #define CONFIG_ENV_OVERWRITE
141 
142 #define CONFIG_EXTRA_ENV_SETTINGS \
143 	"loadaddr=0x82000000\0" \
144 	"console=ttyS2,115200n8\0" \
145 	"mmcdev=1\0" \
146 	"mmcroot=/dev/mmcblk0p2 rw\0" \
147 	"mmcrootfstype=ext3 rootwait\0" \
148 	"mmcargs=setenv bootargs console=${console} " \
149 		"root=${mmcroot} " \
150 		"rootfstype=${mmcrootfstype}\0" \
151 	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
152 	"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
153 		"source ${loadaddr}\0" \
154 	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
155 	"mmcboot=echo Booting from mmc${mmcdev} ...; " \
156 		"run mmcargs; " \
157 		"bootm ${loadaddr}\0" \
158 
159 #define CONFIG_BOOTCOMMAND \
160 	"if mmc init ${mmcdev}; then " \
161 		"if run loadbootscript; then " \
162 			"run bootscript; " \
163 		"else " \
164 			"if run loaduimage; then " \
165 				"run mmcboot; " \
166 			"else run nandboot; " \
167 			"fi; " \
168 		"fi; " \
169 	"fi"
170 
171 #define CONFIG_AUTO_COMPLETE		1
172 
173 /*
174  * Miscellaneous configurable options
175  */
176 
177 #define CONFIG_SYS_LONGHELP	/* undef to save memory */
178 #define CONFIG_SYS_HUSH_PARSER	/* use "hush" command parser */
179 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
180 #define CONFIG_SYS_PROMPT		"OMAP4430 SDP # "
181 #define CONFIG_SYS_CBSIZE		256
182 /* Print Buffer Size */
183 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
184 					sizeof(CONFIG_SYS_PROMPT) + 16)
185 #define CONFIG_SYS_MAXARGS		16
186 /* Boot Argument Buffer Size */
187 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
188 
189 /*
190  * memtest setup
191  */
192 #define CONFIG_SYS_MEMTEST_START	0x80000000
193 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (32 << 20))
194 
195 /* Default load address */
196 #define CONFIG_SYS_LOAD_ADDR		0x80000000
197 
198 /* Use General purpose timer 1 */
199 #define CONFIG_SYS_TIMERBASE		GPT1_BASE
200 #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
201 #define CONFIG_SYS_HZ			1000
202 
203 /*
204  * Stack sizes
205  *
206  * The stack sizes are set up in start.S using the settings below
207  */
208 #define CONFIG_STACKSIZE	(128 << 10)	/* Regular stack */
209 #ifdef CONFIG_USE_IRQ
210 #define CONFIG_STACKSIZE_IRQ	(4 << 10)	/* IRQ stack */
211 #define CONFIG_STACKSIZE_FIQ	(4 << 10)	/* FIQ stack */
212 #endif
213 
214 /*
215  * SDRAM Memory Map
216  * Even though we use two CS all the memory
217  * is mapped to one contiguous block
218  */
219 #define CONFIG_NR_DRAM_BANKS	1
220 
221 #endif /* __CONFIG_H */
222