1 /* 2 * (C) Copyright 2010 3 * Texas Instruments Incorporated. 4 * Aneesh V <aneesh@ti.com> 5 * Steve Sakoman <steve@sakoman.com> 6 * 7 * Configuration settings for the TI SDP4430 board. 8 * 9 * See file CREDITS for list of people who contributed to this 10 * project. 11 * 12 * This program is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License as 14 * published by the Free Software Foundation; either version 2 of 15 * the License, or (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 25 * MA 02111-1307 USA 26 */ 27 28 #ifndef __CONFIG_H 29 #define __CONFIG_H 30 31 /* 32 * High Level Configuration Options 33 */ 34 #define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */ 35 #define CONFIG_OMAP 1 /* in a TI OMAP core */ 36 #define CONFIG_OMAP44XX 1 /* which is a 44XX */ 37 #define CONFIG_OMAP4430 1 /* which is in a 4430 */ 38 #define CONFIG_4430SDP 1 /* working with SDP */ 39 #define CONFIG_ARCH_CPU_INIT 40 41 /* Get CPU defs */ 42 #include <asm/arch/cpu.h> 43 #include <asm/arch/omap4.h> 44 45 /* Display CPU and Board Info */ 46 #define CONFIG_DISPLAY_CPUINFO 1 47 #define CONFIG_DISPLAY_BOARDINFO 1 48 49 /* Keep L2 Cache Disabled */ 50 #define CONFIG_L2_OFF 1 51 52 /* Clock Defines */ 53 #define V_OSCK 38400000 /* Clock output from T2 */ 54 #define V_SCLK V_OSCK 55 56 #undef CONFIG_USE_IRQ /* no support for IRQs */ 57 #define CONFIG_MISC_INIT_R 58 59 #define CONFIG_OF_LIBFDT 1 60 61 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 62 #define CONFIG_SETUP_MEMORY_TAGS 1 63 #define CONFIG_INITRD_TAG 1 64 #define CONFIG_REVISION_TAG 1 65 66 /* 67 * Size of malloc() pool 68 * Total Size Environment - 128k 69 * Malloc - add 256k 70 */ 71 #define CONFIG_ENV_SIZE (128 << 10) 72 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10)) 73 /* Vector Base */ 74 #define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE 75 76 /* 77 * Hardware drivers 78 */ 79 80 /* 81 * serial port - NS16550 compatible 82 */ 83 #define V_NS16550_CLK 48000000 84 85 #define CONFIG_SYS_NS16550 86 #define CONFIG_SYS_NS16550_SERIAL 87 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 88 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 89 #define CONFIG_CONS_INDEX 3 90 #define CONFIG_SYS_NS16550_COM3 UART3_BASE 91 92 #define CONFIG_BAUDRATE 115200 93 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 94 115200} 95 /* I2C */ 96 #define CONFIG_HARD_I2C 1 97 #define CONFIG_SYS_I2C_SPEED 100000 98 #define CONFIG_SYS_I2C_SLAVE 1 99 #define CONFIG_SYS_I2C_BUS 0 100 #define CONFIG_SYS_I2C_BUS_SELECT 1 101 #define CONFIG_DRIVER_OMAP34XX_I2C 1 102 #define CONFIG_I2C_MULTI_BUS 1 103 104 /* TWL6030 */ 105 #define CONFIG_TWL6030_POWER 1 106 #define CONFIG_CMD_BAT 1 107 108 /* MMC */ 109 #define CONFIG_GENERIC_MMC 1 110 #define CONFIG_MMC 1 111 #define CONFIG_OMAP_HSMMC 1 112 #define CONFIG_SYS_MMC_SET_DEV 1 113 #define CONFIG_DOS_PARTITION 1 114 115 /* MMC ENV related defines */ 116 #define CONFIG_ENV_IS_IN_MMC 1 117 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ 118 #define CONFIG_ENV_OFFSET 0xE0000 119 120 /* USB */ 121 #define CONFIG_MUSB_UDC 1 122 #define CONFIG_USB_OMAP3 1 123 124 /* USB device configuration */ 125 #define CONFIG_USB_DEVICE 1 126 #define CONFIG_USB_TTY 1 127 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 128 129 /* Flash */ 130 #define CONFIG_SYS_NO_FLASH 1 131 132 /* commands to include */ 133 #include <config_cmd_default.h> 134 135 /* Enabled commands */ 136 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 137 #define CONFIG_CMD_FAT /* FAT support */ 138 #define CONFIG_CMD_I2C /* I2C serial bus support */ 139 #define CONFIG_CMD_MMC /* MMC support */ 140 #define CONFIG_CMD_SAVEENV 141 142 /* Disabled commands */ 143 #undef CONFIG_CMD_NET 144 #undef CONFIG_CMD_NFS 145 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 146 #undef CONFIG_CMD_IMLS /* List all found images */ 147 148 /* 149 * Environment setup 150 */ 151 152 #define CONFIG_BOOTDELAY 3 153 154 #define CONFIG_ENV_OVERWRITE 155 156 #define CONFIG_EXTRA_ENV_SETTINGS \ 157 "loadaddr=0x82000000\0" \ 158 "console=ttyS2,115200n8\0" \ 159 "usbtty=cdc_acm\0" \ 160 "vram=16M\0" \ 161 "mmcdev=0\0" \ 162 "mmcroot=/dev/mmcblk0p2 rw\0" \ 163 "mmcrootfstype=ext3 rootwait\0" \ 164 "mmcargs=setenv bootargs console=${console} " \ 165 "vram=${vram} " \ 166 "root=${mmcroot} " \ 167 "rootfstype=${mmcrootfstype}\0" \ 168 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 169 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ 170 "source ${loadaddr}\0" \ 171 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 172 "mmcboot=echo Booting from mmc${mmcdev} ...; " \ 173 "run mmcargs; " \ 174 "bootm ${loadaddr}\0" \ 175 176 #define CONFIG_BOOTCOMMAND \ 177 "if mmc rescan ${mmcdev}; then " \ 178 "if run loadbootscript; then " \ 179 "run bootscript; " \ 180 "else " \ 181 "if run loaduimage; then " \ 182 "run mmcboot; " \ 183 "fi; " \ 184 "fi; " \ 185 "fi" 186 187 #define CONFIG_AUTO_COMPLETE 1 188 189 /* 190 * Miscellaneous configurable options 191 */ 192 193 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 194 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 195 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 196 #define CONFIG_SYS_PROMPT "OMAP4430 SDP # " 197 #define CONFIG_SYS_CBSIZE 256 198 /* Print Buffer Size */ 199 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 200 sizeof(CONFIG_SYS_PROMPT) + 16) 201 #define CONFIG_SYS_MAXARGS 16 202 /* Boot Argument Buffer Size */ 203 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 204 205 /* 206 * memtest setup 207 */ 208 #define CONFIG_SYS_MEMTEST_START 0x80000000 209 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20)) 210 211 /* Default load address */ 212 #define CONFIG_SYS_LOAD_ADDR 0x80000000 213 214 /* Use General purpose timer 1 */ 215 #define CONFIG_SYS_TIMERBASE GPT2_BASE 216 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 217 #define CONFIG_SYS_HZ 1000 218 219 /* 220 * Stack sizes 221 * 222 * The stack sizes are set up in start.S using the settings below 223 */ 224 #define CONFIG_STACKSIZE (128 << 10) /* Regular stack */ 225 #ifdef CONFIG_USE_IRQ 226 #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack */ 227 #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */ 228 #endif 229 230 /* 231 * SDRAM Memory Map 232 * Even though we use two CS all the memory 233 * is mapped to one contiguous block 234 */ 235 #define CONFIG_NR_DRAM_BANKS 1 236 237 #define CONFIG_SYS_SDRAM_BASE 0x80000000 238 #define CONFIG_SYS_INIT_RAM_ADDR 0x4030D800 239 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 240 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 241 CONFIG_SYS_INIT_RAM_SIZE - \ 242 GENERATED_GBL_DATA_SIZE) 243 244 #endif /* __CONFIG_H */ 245