xref: /openbmc/u-boot/include/configs/omap4_sdp4430.h (revision 802d996324777173f123116c00a6c654f4a4177a)
1 /*
2  * (C) Copyright 2010
3  * Texas Instruments Incorporated.
4  * Aneesh V       <aneesh@ti.com>
5  * Steve Sakoman  <steve@sakoman.com>
6  *
7  * Configuration settings for the TI SDP4430 board.
8  *
9  * See file CREDITS for list of people who contributed to this
10  * project.
11  *
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License as
14  * published by the Free Software Foundation; either version 2 of
15  * the License, or (at your option) any later version.
16  *
17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
20  * GNU General Public License for more details.
21  *
22  * You should have received a copy of the GNU General Public License
23  * along with this program; if not, write to the Free Software
24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25  * MA 02111-1307 USA
26  */
27 
28 #ifndef __CONFIG_H
29 #define __CONFIG_H
30 
31 /*
32  * High Level Configuration Options
33  */
34 #define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
35 #define CONFIG_OMAP		1	/* in a TI OMAP core */
36 #define CONFIG_OMAP44XX		1	/* which is a 44XX */
37 #define CONFIG_OMAP4430		1	/* which is in a 4430 */
38 #define CONFIG_4430SDP		1	/* working with SDP */
39 #define CONFIG_ARCH_CPU_INIT
40 
41 /* Get CPU defs */
42 #include <asm/arch/cpu.h>
43 #include <asm/arch/omap4.h>
44 
45 /* Display CPU and Board Info */
46 #define CONFIG_DISPLAY_CPUINFO		1
47 #define CONFIG_DISPLAY_BOARDINFO	1
48 
49 /* Keep L2 Cache Disabled */
50 #define CONFIG_L2_OFF			1
51 
52 /* Clock Defines */
53 #define V_OSCK			38400000	/* Clock output from T2 */
54 #define V_SCLK                   V_OSCK
55 
56 #undef CONFIG_USE_IRQ				/* no support for IRQs */
57 #define CONFIG_MISC_INIT_R
58 
59 #define CONFIG_OF_LIBFDT		1
60 
61 #define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
62 #define CONFIG_SETUP_MEMORY_TAGS	1
63 #define CONFIG_INITRD_TAG		1
64 #define CONFIG_REVISION_TAG		1
65 
66 /*
67  * Size of malloc() pool
68  * Total Size Environment - 128k
69  * Malloc - add 256k
70  */
71 #define CONFIG_ENV_SIZE			(128 << 10)
72 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (256 << 10))
73 						/* initial data */
74 /* Vector Base */
75 #define CONFIG_SYS_CA9_VECTOR_BASE	SRAM_ROM_VECT_BASE
76 
77 /*
78  * Hardware drivers
79  */
80 
81 /*
82  * serial port - NS16550 compatible
83  */
84 #define V_NS16550_CLK			48000000
85 
86 #define CONFIG_SYS_NS16550
87 #define CONFIG_SYS_NS16550_SERIAL
88 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
89 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
90 #define CONFIG_CONS_INDEX		3
91 #define CONFIG_SYS_NS16550_COM3		UART3_BASE
92 
93 #define CONFIG_BAUDRATE			115200
94 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
95 					115200}
96 /* I2C  */
97 #define CONFIG_HARD_I2C			1
98 #define CONFIG_SYS_I2C_SPEED		100000
99 #define CONFIG_SYS_I2C_SLAVE		1
100 #define CONFIG_SYS_I2C_BUS		0
101 #define CONFIG_SYS_I2C_BUS_SELECT	1
102 #define CONFIG_DRIVER_OMAP34XX_I2C	1
103 #define CONFIG_I2C_MULTI_BUS		1
104 
105 /* TWL6030 */
106 #define CONFIG_TWL6030_POWER		1
107 #define CONFIG_CMD_BAT			1
108 
109 /* MMC */
110 #define CONFIG_GENERIC_MMC		1
111 #define CONFIG_MMC			1
112 #define CONFIG_OMAP_HSMMC		1
113 #define CONFIG_SYS_MMC_SET_DEV		1
114 #define CONFIG_DOS_PARTITION		1
115 
116 /* MMC ENV related defines */
117 #define CONFIG_ENV_IS_IN_MMC		1
118 #define CONFIG_SYS_MMC_ENV_DEV		1	/* SLOT2: eMMC(1) */
119 #define CONFIG_ENV_OFFSET		0xE0000
120 
121 /* USB */
122 #define CONFIG_MUSB_UDC			1
123 #define CONFIG_USB_OMAP3		1
124 
125 /* USB device configuration */
126 #define CONFIG_USB_DEVICE		1
127 #define CONFIG_USB_TTY			1
128 #define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
129 
130 /* Flash */
131 #define CONFIG_SYS_NO_FLASH	1
132 
133 /* commands to include */
134 #include <config_cmd_default.h>
135 
136 /* Enabled commands */
137 #define CONFIG_CMD_EXT2		/* EXT2 Support                 */
138 #define CONFIG_CMD_FAT		/* FAT support                  */
139 #define CONFIG_CMD_I2C		/* I2C serial bus support	*/
140 #define CONFIG_CMD_MMC		/* MMC support                  */
141 #define CONFIG_CMD_SAVEENV
142 
143 /* Disabled commands */
144 #undef CONFIG_CMD_NET
145 #undef CONFIG_CMD_NFS
146 #undef CONFIG_CMD_FPGA		/* FPGA configuration Support   */
147 #undef CONFIG_CMD_IMLS		/* List all found images        */
148 
149 /*
150  * Environment setup
151  */
152 
153 #define CONFIG_BOOTDELAY	3
154 
155 #define CONFIG_ENV_OVERWRITE
156 
157 #define CONFIG_EXTRA_ENV_SETTINGS \
158 	"loadaddr=0x82000000\0" \
159 	"console=ttyS2,115200n8\0" \
160 	"usbtty=cdc_acm\0" \
161 	"vram=16M\0" \
162 	"mmcdev=0\0" \
163 	"mmcroot=/dev/mmcblk0p2 rw\0" \
164 	"mmcrootfstype=ext3 rootwait\0" \
165 	"mmcargs=setenv bootargs console=${console} " \
166 		"vram=${vram} " \
167 		"root=${mmcroot} " \
168 		"rootfstype=${mmcrootfstype}\0" \
169 	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
170 	"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
171 		"source ${loadaddr}\0" \
172 	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
173 	"mmcboot=echo Booting from mmc${mmcdev} ...; " \
174 		"run mmcargs; " \
175 		"bootm ${loadaddr}\0" \
176 
177 #define CONFIG_BOOTCOMMAND \
178 	"if mmc rescan ${mmcdev}; then " \
179 		"if run loadbootscript; then " \
180 			"run bootscript; " \
181 		"else " \
182 			"if run loaduimage; then " \
183 				"run mmcboot; " \
184 			"fi; " \
185 		"fi; " \
186 	"fi"
187 
188 #define CONFIG_AUTO_COMPLETE		1
189 
190 /*
191  * Miscellaneous configurable options
192  */
193 
194 #define CONFIG_SYS_LONGHELP	/* undef to save memory */
195 #define CONFIG_SYS_HUSH_PARSER	/* use "hush" command parser */
196 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
197 #define CONFIG_SYS_PROMPT		"OMAP4430 SDP # "
198 #define CONFIG_SYS_CBSIZE		256
199 /* Print Buffer Size */
200 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
201 					sizeof(CONFIG_SYS_PROMPT) + 16)
202 #define CONFIG_SYS_MAXARGS		16
203 /* Boot Argument Buffer Size */
204 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
205 
206 /*
207  * memtest setup
208  */
209 #define CONFIG_SYS_MEMTEST_START	0x80000000
210 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (32 << 20))
211 
212 /* Default load address */
213 #define CONFIG_SYS_LOAD_ADDR		0x80000000
214 
215 /* Use General purpose timer 1 */
216 #define CONFIG_SYS_TIMERBASE		GPT2_BASE
217 #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
218 #define CONFIG_SYS_HZ			1000
219 
220 /*
221  * Stack sizes
222  *
223  * The stack sizes are set up in start.S using the settings below
224  */
225 #define CONFIG_STACKSIZE	(128 << 10)	/* Regular stack */
226 #ifdef CONFIG_USE_IRQ
227 #define CONFIG_STACKSIZE_IRQ	(4 << 10)	/* IRQ stack */
228 #define CONFIG_STACKSIZE_FIQ	(4 << 10)	/* FIQ stack */
229 #endif
230 
231 /*
232  * SDRAM Memory Map
233  * Even though we use two CS all the memory
234  * is mapped to one contiguous block
235  */
236 #define CONFIG_NR_DRAM_BANKS	1
237 
238 #define CONFIG_SYS_SDRAM_BASE		0x80000000
239 #define CONFIG_SYS_INIT_RAM_ADDR	0x4030D800
240 #define CONFIG_SYS_INIT_RAM_SIZE	0x800
241 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
242 					 CONFIG_SYS_INIT_RAM_SIZE - \
243 					 GENERATED_GBL_DATA_SIZE)
244 
245 #endif /* __CONFIG_H */
246