1 /* 2 * (C) Copyright 2006-2008 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com> 6 * Nishanth Menon <nm@ti.com> 7 * 8 * Configuration settings for the TI OMAP3430 Zoom MDK board. 9 * 10 * See file CREDITS for list of people who contributed to this 11 * project. 12 * 13 * This program is free software; you can redistribute it and/or 14 * modify it under the terms of the GNU General Public License as 15 * published by the Free Software Foundation; either version 2 of 16 * the License, or (at your option) any later version. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 * 23 * You should have received a copy of the GNU General Public License 24 * along with this program; if not, write to the Free Software 25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 26 * MA 02111-1307 USA 27 */ 28 29 #ifndef __CONFIG_H 30 #define __CONFIG_H 31 32 /* 33 * High Level Configuration Options 34 */ 35 #define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */ 36 #define CONFIG_OMAP 1 /* in a TI OMAP core */ 37 #define CONFIG_OMAP34XX 1 /* which is a 34XX */ 38 #define CONFIG_OMAP3430 1 /* which is in a 3430 */ 39 #define CONFIG_OMAP3_ZOOM1 1 /* working with Zoom MDK Rev1 */ 40 41 #define CONFIG_SDRC /* The chip has SDRC controller */ 42 43 #include <asm/arch/cpu.h> /* get chip and board defs */ 44 #include <asm/arch/omap3.h> 45 46 /* 47 * Display CPU and Board information 48 */ 49 #define CONFIG_DISPLAY_CPUINFO 1 50 #define CONFIG_DISPLAY_BOARDINFO 1 51 52 /* Clock Defines */ 53 #define V_OSCK 26000000 /* Clock output from T2 */ 54 #define V_SCLK (V_OSCK >> 1) 55 56 #undef CONFIG_USE_IRQ /* no support for IRQs */ 57 #define CONFIG_MISC_INIT_R 58 59 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 60 #define CONFIG_SETUP_MEMORY_TAGS 1 61 #define CONFIG_INITRD_TAG 1 62 #define CONFIG_REVISION_TAG 1 63 64 /* 65 * Size of malloc() pool 66 */ 67 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 68 /* Sector */ 69 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 70 /* initial data */ 71 72 /* 73 * Hardware drivers 74 */ 75 76 /* 77 * NS16550 Configuration 78 */ 79 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 80 81 #define CONFIG_SYS_NS16550 82 #define CONFIG_SYS_NS16550_SERIAL 83 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 84 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 85 86 /* 87 * select serial console configuration 88 */ 89 #define CONFIG_CONS_INDEX 3 90 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 91 #define CONFIG_SERIAL3 3 /* UART3 */ 92 93 /* allow to overwrite serial and ethaddr */ 94 #define CONFIG_ENV_OVERWRITE 95 #define CONFIG_BAUDRATE 115200 96 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 97 115200} 98 #define CONFIG_MMC 1 99 #define CONFIG_OMAP3_MMC 1 100 #define CONFIG_DOS_PARTITION 1 101 102 /* DDR - I use Micron DDR */ 103 #define CONFIG_OMAP3_MICRON_DDR 1 104 105 /* USB */ 106 #define CONFIG_MUSB_UDC 1 107 #define CONFIG_USB_OMAP3 1 108 #define CONFIG_TWL4030_USB 1 109 110 /* USB device configuration */ 111 #define CONFIG_USB_DEVICE 1 112 #define CONFIG_USB_TTY 1 113 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 114 /* Change these to suit your needs */ 115 #define CONFIG_USBD_VENDORID 0x0451 116 #define CONFIG_USBD_PRODUCTID 0x5678 117 #define CONFIG_USBD_MANUFACTURER "Texas Instruments" 118 #define CONFIG_USBD_PRODUCT_NAME "Zoom1" 119 120 /* commands to include */ 121 #include <config_cmd_default.h> 122 123 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 124 #define CONFIG_CMD_FAT /* FAT support */ 125 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ 126 127 #define CONFIG_CMD_I2C /* I2C serial bus support */ 128 #define CONFIG_CMD_MMC /* MMC support */ 129 #define CONFIG_CMD_NAND /* NAND support */ 130 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */ 131 132 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 133 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 134 #undef CONFIG_CMD_IMI /* iminfo */ 135 #undef CONFIG_CMD_IMLS /* List all found images */ 136 #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ 137 #undef CONFIG_CMD_NFS /* NFS support */ 138 139 #define CONFIG_SYS_NO_FLASH 140 #define CONFIG_HARD_I2C 1 141 #define CONFIG_SYS_I2C_SPEED 100000 142 #define CONFIG_SYS_I2C_SLAVE 1 143 #define CONFIG_SYS_I2C_BUS 0 144 #define CONFIG_SYS_I2C_BUS_SELECT 1 145 #define CONFIG_DRIVER_OMAP34XX_I2C 1 146 147 /* 148 * TWL4030 149 */ 150 #define CONFIG_TWL4030_POWER 1 151 #define CONFIG_TWL4030_LED 1 152 153 /* 154 * Board NAND Info. 155 */ 156 #define CONFIG_NAND_OMAP_GPMC 157 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 158 /* to access nand */ 159 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 160 /* to access nand at */ 161 /* CS0 */ 162 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 163 164 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 165 /* devices */ 166 #define CONFIG_JFFS2_NAND 167 /* nand device jffs2 lives on */ 168 #define CONFIG_JFFS2_DEV "nand0" 169 /* start of jffs2 partition */ 170 #define CONFIG_JFFS2_PART_OFFSET 0x680000 171 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ 172 /* partition */ 173 174 /* Environment information */ 175 #define CONFIG_BOOTDELAY 10 176 177 #define CONFIG_EXTRA_ENV_SETTINGS \ 178 "loadaddr=0x82000000\0" \ 179 "usbtty=cdc_acm\0" \ 180 "console=ttyS2,115200n8\0" \ 181 "videomode=1024x768@60,vxres=1024,vyres=768\0" \ 182 "videospec=omapfb:vram:2M,vram:4M\0" \ 183 "mmcargs=setenv bootargs console=${console} " \ 184 "video=${videospec},mode:${videomode} " \ 185 "root=/dev/mmcblk0p2 rw " \ 186 "rootfstype=ext3 rootwait\0" \ 187 "nandargs=setenv bootargs console=${console} " \ 188 "video=${videospec},mode:${videomode} " \ 189 "root=/dev/mtdblock4 rw " \ 190 "rootfstype=jffs2\0" \ 191 "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ 192 "bootscript=echo Running bootscript from mmc ...; " \ 193 "source ${loadaddr}\0" \ 194 "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ 195 "mmcboot=echo Booting from mmc ...; " \ 196 "run mmcargs; " \ 197 "bootm ${loadaddr}\0" \ 198 "nandboot=echo Booting from nand ...; " \ 199 "run nandargs; " \ 200 "nand read ${loadaddr} 280000 400000; " \ 201 "bootm ${loadaddr}\0" \ 202 203 #define CONFIG_BOOTCOMMAND \ 204 "if mmc init; then " \ 205 "if run loadbootscript; then " \ 206 "run bootscript; " \ 207 "else " \ 208 "if run loaduimage; then " \ 209 "run mmcboot; " \ 210 "else run nandboot; " \ 211 "fi; " \ 212 "fi; " \ 213 "else run nandboot; fi" 214 215 #define CONFIG_AUTO_COMPLETE 1 216 /* 217 * Miscellaneous configurable options 218 */ 219 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 220 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 221 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 222 #define CONFIG_SYS_PROMPT "OMAP3 Zoom1 # " 223 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 224 /* Print Buffer Size */ 225 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 226 sizeof(CONFIG_SYS_PROMPT) + 16) 227 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 228 /* Boot Argument Buffer Size */ 229 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 230 231 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ 232 /* works on */ 233 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 234 0x01F00000) /* 31MB */ 235 236 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ 237 /* load address */ 238 239 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 240 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 241 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 242 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 243 CONFIG_SYS_INIT_RAM_SIZE - \ 244 GENERATED_GBL_DATA_SIZE) 245 /* 246 * OMAP3 has 12 GP timers, they can be driven by the system clock 247 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 248 * This rate is divided by a local divisor. 249 */ 250 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 251 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 252 #define CONFIG_SYS_HZ 1000 253 254 /*----------------------------------------------------------------------- 255 * Stack sizes 256 * 257 * The stack sizes are set up in start.S using the settings below 258 */ 259 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ 260 #ifdef CONFIG_USE_IRQ 261 #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */ 262 #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */ 263 #endif 264 265 /*----------------------------------------------------------------------- 266 * Physical Memory Map 267 */ 268 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 269 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 270 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */ 271 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 272 273 /* SDRAM Bank Allocation method */ 274 #define SDRC_R_B_C 1 275 276 /*----------------------------------------------------------------------- 277 * FLASH and environment organization 278 */ 279 280 /* **** PISMO SUPPORT *** */ 281 282 /* Configure the PISMO */ 283 #define PISMO1_NAND_SIZE GPMC_SIZE_128M 284 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M 285 286 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 287 288 #define CONFIG_SYS_FLASH_BASE boot_flash_base 289 290 /* Monitor at start of flash */ 291 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 292 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 293 294 #define CONFIG_ENV_IS_IN_NAND 1 295 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ 296 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 297 298 #define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec 299 #define CONFIG_ENV_OFFSET boot_flash_off 300 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 301 302 #ifndef __ASSEMBLY__ 303 extern unsigned int boot_flash_base; 304 extern volatile unsigned int boot_flash_env_addr; 305 extern unsigned int boot_flash_off; 306 extern unsigned int boot_flash_sec; 307 extern unsigned int boot_flash_type; 308 #endif 309 310 #endif /* __CONFIG_H */ 311