1 /* 2 * (C) Copyright 2008-2010 3 * Gražvydas Ignotas <notasas@gmail.com> 4 * 5 * Configuration settings for the OMAP3 Pandora. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 /* 14 * High Level Configuration Options 15 */ 16 #define CONFIG_OMAP 1 /* in a TI OMAP core */ 17 #define CONFIG_OMAP34XX 1 /* which is a 34XX */ 18 #define CONFIG_OMAP3_PANDORA 1 /* working with pandora */ 19 #define CONFIG_OMAP_GPIO 20 #define CONFIG_OMAP_COMMON 21 22 #define CONFIG_SDRC /* The chip has SDRC controller */ 23 24 #include <asm/arch/cpu.h> /* get chip and board defs */ 25 #include <asm/arch/omap3.h> 26 27 /* 28 * Display CPU and Board information 29 */ 30 #define CONFIG_DISPLAY_CPUINFO 1 31 #define CONFIG_DISPLAY_BOARDINFO 1 32 33 /* Clock Defines */ 34 #define V_OSCK 26000000 /* Clock output from T2 */ 35 #define V_SCLK (V_OSCK >> 1) 36 37 #define CONFIG_MISC_INIT_R 38 39 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 40 #define CONFIG_SETUP_MEMORY_TAGS 1 41 #define CONFIG_INITRD_TAG 1 42 #define CONFIG_REVISION_TAG 1 43 44 #define CONFIG_OF_LIBFDT 1 45 46 /* 47 * Size of malloc() pool 48 */ 49 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 50 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE) 51 52 /* 53 * Hardware drivers 54 */ 55 56 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 57 #define CONFIG_SYS_DEVICE_NULLDEV 1 58 59 /* USB */ 60 #define CONFIG_MUSB_UDC 1 61 #define CONFIG_USB_OMAP3 1 62 #define CONFIG_TWL4030_USB 1 63 64 /* USB device configuration */ 65 #define CONFIG_USB_DEVICE 1 66 #define CONFIG_USB_TTY 1 67 68 /* 69 * NS16550 Configuration 70 */ 71 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 72 73 #define CONFIG_SYS_NS16550 74 #define CONFIG_SYS_NS16550_SERIAL 75 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 76 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 77 78 /* 79 * select serial console configuration 80 */ 81 #define CONFIG_CONS_INDEX 3 82 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 83 #define CONFIG_SERIAL3 3 84 85 /* allow to overwrite serial and ethaddr */ 86 #define CONFIG_ENV_OVERWRITE 87 #define CONFIG_BAUDRATE 115200 88 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ 89 115200} 90 #define CONFIG_GENERIC_MMC 1 91 #define CONFIG_MMC 1 92 #define CONFIG_OMAP_HSMMC 1 93 #define CONFIG_DOS_PARTITION 1 94 95 /* commands to include */ 96 #include <config_cmd_default.h> 97 98 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 99 #define CONFIG_CMD_FAT /* FAT support */ 100 101 #define CONFIG_CMD_I2C /* I2C serial bus support */ 102 #define CONFIG_CMD_MMC /* MMC support */ 103 #define CONFIG_CMD_NAND /* NAND support */ 104 #define CONFIG_CMD_CACHE /* Cache control */ 105 106 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 107 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 108 #undef CONFIG_CMD_IMI /* iminfo */ 109 #undef CONFIG_CMD_IMLS /* List all found images */ 110 #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ 111 #undef CONFIG_CMD_NFS /* NFS support */ 112 113 #define CONFIG_SYS_NO_FLASH 114 #define CONFIG_SYS_I2C 115 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 116 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 117 #define CONFIG_SYS_I2C_OMAP34XX 118 119 /* 120 * TWL4030 121 */ 122 #define CONFIG_TWL4030_POWER 1 123 #define CONFIG_TWL4030_LED 1 124 125 /* 126 * Board NAND Info. 127 */ 128 #define CONFIG_NAND_OMAP_GPMC 129 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 130 /* to access nand */ 131 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 132 /* to access nand */ 133 /* at CS0 */ 134 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 135 /* devices */ 136 137 #ifdef CONFIG_CMD_NAND 138 #define CONFIG_CMD_MTDPARTS 139 #define CONFIG_MTD_PARTITIONS 140 #define CONFIG_MTD_DEVICE 141 #define CONFIG_CMD_UBI 142 #define CONFIG_CMD_UBIFS 143 #define CONFIG_RBTREE 144 #define CONFIG_LZO 145 146 #define MTDIDS_DEFAULT "nand0=nand" 147 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(xloader),"\ 148 "1920k(uboot),128k(uboot-env),"\ 149 "10m(boot),-(rootfs)" 150 #else 151 #define MTDPARTS_DEFAULT 152 #endif 153 154 /* Environment information */ 155 #define CONFIG_BOOTDELAY 1 156 157 #define CONFIG_EXTRA_ENV_SETTINGS \ 158 "usbtty=cdc_acm\0" \ 159 "loadaddr=0x82000000\0" \ 160 "bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \ 161 "rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \ 162 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 163 164 #define CONFIG_BOOTCOMMAND \ 165 "if mmc rescan && fatload mmc1 0 ${loadaddr} autoboot.scr || " \ 166 "ext2load mmc1 0 ${loadaddr} autoboot.scr; then " \ 167 "source ${loadaddr}; " \ 168 "fi; " \ 169 "ubi part boot && ubifsmount ubi:boot && " \ 170 "ubifsload ${loadaddr} uImage && bootm ${loadaddr}" 171 172 #define CONFIG_AUTO_COMPLETE 1 173 /* 174 * Miscellaneous configurable options 175 */ 176 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 177 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 178 #define CONFIG_SYS_PROMPT "Pandora # " 179 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 180 /* Print Buffer Size */ 181 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 182 sizeof(CONFIG_SYS_PROMPT) + 16) 183 #define CONFIG_SYS_MAXARGS 16 /* max number of command */ 184 /* args */ 185 /* Boot Argument Buffer Size */ 186 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 187 /* memtest works on */ 188 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 189 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 190 0x01F00000) /* 31MB */ 191 192 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 193 /* address */ 194 195 /* 196 * OMAP3 has 12 GP timers, they can be driven by the system clock 197 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 198 * This rate is divided by a local divisor. 199 */ 200 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 201 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 202 203 /*----------------------------------------------------------------------- 204 * Physical Memory Map 205 */ 206 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 207 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 208 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 209 210 #define CONFIG_SYS_TEXT_BASE 0x80008000 211 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 212 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 213 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 214 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 215 CONFIG_SYS_INIT_RAM_SIZE - \ 216 GENERATED_GBL_DATA_SIZE) 217 218 /*----------------------------------------------------------------------- 219 * FLASH and environment organization 220 */ 221 222 /* **** PISMO SUPPORT *** */ 223 224 /* Configure the PISMO */ 225 #define PISMO1_NAND_SIZE GPMC_SIZE_128M 226 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M 227 228 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 229 230 #if defined(CONFIG_CMD_NAND) 231 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE 232 #endif 233 234 /* Monitor at start of flash */ 235 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 236 237 #define CONFIG_ENV_IS_IN_NAND 1 238 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 239 240 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 241 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 242 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 243 244 #define CONFIG_SYS_CACHELINE_SIZE 64 245 246 #endif /* __CONFIG_H */ 247