1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2008-2010
4  * Gražvydas Ignotas <notasas@gmail.com>
5  *
6  * Configuration settings for the OMAP3 Pandora.
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 #define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
13 
14 /* override base for compatibility with MLO the device ships with */
15 
16 #include <configs/ti_omap3_common.h>
17 
18 #define CONFIG_MISC_INIT_R
19 #define CONFIG_REVISION_TAG		1
20 
21 #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
22 
23 #define CONFIG_SYS_DEVICE_NULLDEV	1
24 
25 /*
26  * Hardware drivers
27  */
28 
29 /* TWL4030 LED */
30 #define CONFIG_TWL4030_LED
31 
32 /*
33  * NS16550 Configuration
34  */
35 #undef CONFIG_SYS_NS16550_CLK
36 #define CONFIG_SYS_NS16550_SERIAL
37 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
38 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
39 #define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
40 #define CONFIG_SERIAL3			3
41 
42 /* commands to include */
43 
44 /*
45  * Board NAND Info.
46  */
47 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_HAM1_CODE_SW
48 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
49 #define CONFIG_SYS_NAND_OOBSIZE		64
50 
51 
52 #define CONFIG_BOOTCOMMAND \
53 	"run distro_bootcmd; " \
54 	"setenv bootargs ${bootargs_ubi}; " \
55 	"if mmc rescan && load mmc 0:1 ${loadaddr} autoboot.scr; then " \
56 		"source ${loadaddr}; " \
57 	"fi; " \
58 	"ubi part boot && ubifsmount ubi:boot && " \
59 		"ubifsload ${loadaddr} uImage && bootm ${loadaddr}"
60 
61 #define BOOT_TARGET_DEVICES(func) \
62 	func(MMC, mmc, 0) \
63 
64 #include <config_distro_bootcmd.h>
65 
66 #define CONFIG_EXTRA_ENV_SETTINGS \
67 	DEFAULT_LINUX_BOOT_ENV \
68 	"usbtty=cdc_acm\0" \
69 	"bootargs_ubi=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \
70 		"rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \
71 	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
72 	BOOTENV \
73 
74 /* memtest works on */
75 #define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
76 #define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
77 					0x01F00000) /* 31MB */
78 
79 #if defined(CONFIG_NAND)
80 #define CONFIG_SYS_FLASH_BASE		NAND_BASE
81 #endif
82 
83 /* Monitor at start of flash */
84 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
85 
86 
87 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
88 #define CONFIG_ENV_OFFSET		0x260000
89 #define CONFIG_ENV_ADDR			0x260000
90 
91 #endif				/* __CONFIG_H */
92