1 /* 2 * (C) Copyright 2008-2010 3 * Gražvydas Ignotas <notasas@gmail.com> 4 * 5 * Configuration settings for the OMAP3 Pandora. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * MA 02111-1307 USA 21 */ 22 23 #ifndef __CONFIG_H 24 #define __CONFIG_H 25 26 /* 27 * High Level Configuration Options 28 */ 29 #define CONFIG_OMAP 1 /* in a TI OMAP core */ 30 #define CONFIG_OMAP34XX 1 /* which is a 34XX */ 31 #define CONFIG_OMAP3430 1 /* which is in a 3430 */ 32 #define CONFIG_OMAP3_PANDORA 1 /* working with pandora */ 33 34 #define CONFIG_SDRC /* The chip has SDRC controller */ 35 36 #include <asm/arch/cpu.h> /* get chip and board defs */ 37 #include <asm/arch/omap3.h> 38 39 /* 40 * Display CPU and Board information 41 */ 42 #define CONFIG_DISPLAY_CPUINFO 1 43 #define CONFIG_DISPLAY_BOARDINFO 1 44 45 /* Clock Defines */ 46 #define V_OSCK 26000000 /* Clock output from T2 */ 47 #define V_SCLK (V_OSCK >> 1) 48 49 #undef CONFIG_USE_IRQ /* no support for IRQs */ 50 #define CONFIG_MISC_INIT_R 51 52 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 53 #define CONFIG_SETUP_MEMORY_TAGS 1 54 #define CONFIG_INITRD_TAG 1 55 #define CONFIG_REVISION_TAG 1 56 57 #define CONFIG_OF_LIBFDT 1 58 59 /* 60 * Size of malloc() pool 61 */ 62 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 63 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE) 64 65 /* 66 * Hardware drivers 67 */ 68 69 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 70 #define CONFIG_SYS_DEVICE_NULLDEV 1 71 72 /* USB */ 73 #define CONFIG_MUSB_UDC 1 74 #define CONFIG_USB_OMAP3 1 75 #define CONFIG_TWL4030_USB 1 76 77 /* USB device configuration */ 78 #define CONFIG_USB_DEVICE 1 79 #define CONFIG_USB_TTY 1 80 81 /* 82 * NS16550 Configuration 83 */ 84 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 85 86 #define CONFIG_SYS_NS16550 87 #define CONFIG_SYS_NS16550_SERIAL 88 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 89 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 90 91 /* 92 * select serial console configuration 93 */ 94 #define CONFIG_CONS_INDEX 3 95 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 96 #define CONFIG_SERIAL3 3 97 98 /* allow to overwrite serial and ethaddr */ 99 #define CONFIG_ENV_OVERWRITE 100 #define CONFIG_BAUDRATE 115200 101 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ 102 115200} 103 #define CONFIG_MMC 1 104 #define CONFIG_OMAP3_MMC 1 105 #define CONFIG_DOS_PARTITION 1 106 107 /* DDR - I use Micron DDR */ 108 #define CONFIG_OMAP3_MICRON_DDR 1 109 110 /* commands to include */ 111 #include <config_cmd_default.h> 112 113 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 114 #define CONFIG_CMD_FAT /* FAT support */ 115 116 #define CONFIG_CMD_I2C /* I2C serial bus support */ 117 #define CONFIG_CMD_MMC /* MMC support */ 118 #define CONFIG_CMD_NAND /* NAND support */ 119 #define CONFIG_CMD_CACHE /* Cache control */ 120 121 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 122 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 123 #undef CONFIG_CMD_IMI /* iminfo */ 124 #undef CONFIG_CMD_IMLS /* List all found images */ 125 #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ 126 #undef CONFIG_CMD_NFS /* NFS support */ 127 128 #define CONFIG_SYS_NO_FLASH 129 #define CONFIG_HARD_I2C 1 130 #define CONFIG_SYS_I2C_SPEED 100000 131 #define CONFIG_SYS_I2C_SLAVE 1 132 #define CONFIG_SYS_I2C_BUS 0 133 #define CONFIG_SYS_I2C_BUS_SELECT 1 134 #define CONFIG_DRIVER_OMAP34XX_I2C 1 135 136 /* 137 * TWL4030 138 */ 139 #define CONFIG_TWL4030_POWER 1 140 #define CONFIG_TWL4030_LED 1 141 142 /* 143 * Board NAND Info. 144 */ 145 #define CONFIG_NAND_OMAP_GPMC 146 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 147 /* to access nand */ 148 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 149 /* to access nand */ 150 /* at CS0 */ 151 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 152 153 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 154 /* devices */ 155 156 #ifdef CONFIG_CMD_NAND 157 #define CONFIG_CMD_MTDPARTS 158 #define CONFIG_MTD_PARTITIONS 159 #define CONFIG_MTD_DEVICE 160 #define CONFIG_CMD_UBI 161 #define CONFIG_CMD_UBIFS 162 #define CONFIG_RBTREE 163 #define CONFIG_LZO 164 165 #define MTDIDS_DEFAULT "nand0=nand" 166 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(xloader),"\ 167 "1920k(uboot),128k(uboot-env),"\ 168 "10m(boot),-(rootfs)" 169 #else 170 #define MTDPARTS_DEFAULT 171 #endif 172 173 /* Environment information */ 174 #define CONFIG_BOOTDELAY 1 175 176 #define CONFIG_EXTRA_ENV_SETTINGS \ 177 "usbtty=cdc_acm\0" \ 178 "loadaddr=0x82000000\0" \ 179 "bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \ 180 "rw rootflags=bulk_read console=ttyS0,115200n8 " \ 181 "vram=6272K omapfb.vram=0:3000K\0" \ 182 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 183 184 #define CONFIG_BOOTCOMMAND \ 185 "if mmc init && fatload mmc1 0 ${loadaddr} autoboot.scr || " \ 186 "ext2load mmc1 0 ${loadaddr} autoboot.scr; then " \ 187 "source ${loadaddr}; " \ 188 "fi; " \ 189 "ubi part boot && ubifsmount boot && ubifsload ${loadaddr} uImage && bootm ${loadaddr}" 190 191 #define CONFIG_AUTO_COMPLETE 1 192 /* 193 * Miscellaneous configurable options 194 */ 195 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 196 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 197 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 198 #define CONFIG_SYS_PROMPT "Pandora # " 199 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 200 /* Print Buffer Size */ 201 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 202 sizeof(CONFIG_SYS_PROMPT) + 16) 203 #define CONFIG_SYS_MAXARGS 16 /* max number of command */ 204 /* args */ 205 /* Boot Argument Buffer Size */ 206 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 207 /* memtest works on */ 208 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 209 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 210 0x01F00000) /* 31MB */ 211 212 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 213 /* address */ 214 215 /* 216 * OMAP3 has 12 GP timers, they can be driven by the system clock 217 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 218 * This rate is divided by a local divisor. 219 */ 220 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 221 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 222 #define CONFIG_SYS_HZ 1000 223 224 /*----------------------------------------------------------------------- 225 * Stack sizes 226 * 227 * The stack sizes are set up in start.S using the settings below 228 */ 229 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ 230 #ifdef CONFIG_USE_IRQ 231 #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */ 232 #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */ 233 #endif 234 235 /*----------------------------------------------------------------------- 236 * Physical Memory Map 237 */ 238 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 239 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 240 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */ 241 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 242 243 /* SDRAM Bank Allocation method */ 244 #define SDRC_R_B_C 1 245 246 #define CONFIG_SYS_TEXT_BASE 0x80008000 247 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 248 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 249 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 250 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 251 CONFIG_SYS_INIT_RAM_SIZE - \ 252 GENERATED_GBL_DATA_SIZE) 253 254 /*----------------------------------------------------------------------- 255 * FLASH and environment organization 256 */ 257 258 /* **** PISMO SUPPORT *** */ 259 260 /* Configure the PISMO */ 261 #define PISMO1_NAND_SIZE GPMC_SIZE_128M 262 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M 263 264 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 265 266 #if defined(CONFIG_CMD_NAND) 267 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE 268 #endif 269 270 /* Monitor at start of flash */ 271 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 272 273 #define CONFIG_ENV_IS_IN_NAND 1 274 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 275 276 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 277 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 278 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 279 280 #endif /* __CONFIG_H */ 281