1 /* 2 * (C) Copyright 2008-2010 3 * Gražvydas Ignotas <notasas@gmail.com> 4 * 5 * Configuration settings for the OMAP3 Pandora. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 /* 14 * High Level Configuration Options 15 */ 16 #define CONFIG_OMAP 1 /* in a TI OMAP core */ 17 #define CONFIG_OMAP3_PANDORA 1 /* working with pandora */ 18 #define CONFIG_OMAP_GPIO 19 #define CONFIG_OMAP_COMMON 20 /* Common ARM Erratas */ 21 #define CONFIG_ARM_ERRATA_454179 22 #define CONFIG_ARM_ERRATA_430973 23 #define CONFIG_ARM_ERRATA_621766 24 25 #define CONFIG_SDRC /* The chip has SDRC controller */ 26 27 #include <asm/arch/cpu.h> /* get chip and board defs */ 28 #include <asm/arch/omap.h> 29 30 /* 31 * Display CPU and Board information 32 */ 33 #define CONFIG_DISPLAY_CPUINFO 1 34 #define CONFIG_DISPLAY_BOARDINFO 1 35 36 /* Clock Defines */ 37 #define V_OSCK 26000000 /* Clock output from T2 */ 38 #define V_SCLK (V_OSCK >> 1) 39 40 #define CONFIG_MISC_INIT_R 41 42 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 43 #define CONFIG_SETUP_MEMORY_TAGS 1 44 #define CONFIG_INITRD_TAG 1 45 #define CONFIG_REVISION_TAG 1 46 47 #define CONFIG_OF_LIBFDT 1 48 49 /* 50 * Size of malloc() pool 51 */ 52 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 53 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE) 54 55 /* 56 * Hardware drivers 57 */ 58 59 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 60 #define CONFIG_SYS_DEVICE_NULLDEV 1 61 62 /* USB */ 63 #define CONFIG_MUSB_UDC 1 64 #define CONFIG_USB_OMAP3 1 65 #define CONFIG_TWL4030_USB 1 66 67 /* USB device configuration */ 68 #define CONFIG_USB_DEVICE 1 69 #define CONFIG_USB_TTY 1 70 71 /* 72 * NS16550 Configuration 73 */ 74 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 75 76 #define CONFIG_SYS_NS16550 77 #define CONFIG_SYS_NS16550_SERIAL 78 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 79 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 80 81 /* 82 * select serial console configuration 83 */ 84 #define CONFIG_CONS_INDEX 3 85 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 86 #define CONFIG_SERIAL3 3 87 88 /* allow to overwrite serial and ethaddr */ 89 #define CONFIG_ENV_OVERWRITE 90 #define CONFIG_BAUDRATE 115200 91 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ 92 115200} 93 #define CONFIG_GENERIC_MMC 1 94 #define CONFIG_MMC 1 95 #define CONFIG_OMAP_HSMMC 1 96 #define CONFIG_DOS_PARTITION 1 97 98 /* commands to include */ 99 #include <config_cmd_default.h> 100 101 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 102 #define CONFIG_CMD_FAT /* FAT support */ 103 104 #define CONFIG_CMD_I2C /* I2C serial bus support */ 105 #define CONFIG_CMD_MMC /* MMC support */ 106 #define CONFIG_CMD_NAND /* NAND support */ 107 #define CONFIG_CMD_CACHE /* Cache control */ 108 109 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 110 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 111 #undef CONFIG_CMD_IMI /* iminfo */ 112 #undef CONFIG_CMD_IMLS /* List all found images */ 113 #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ 114 #undef CONFIG_CMD_NFS /* NFS support */ 115 116 #define CONFIG_SYS_NO_FLASH 117 #define CONFIG_SYS_I2C 118 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 119 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 120 #define CONFIG_SYS_I2C_OMAP34XX 121 122 /* 123 * TWL4030 124 */ 125 #define CONFIG_TWL4030_POWER 1 126 #define CONFIG_TWL4030_LED 1 127 128 /* 129 * Board NAND Info. 130 */ 131 #define CONFIG_NAND_OMAP_GPMC 132 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 133 /* to access nand */ 134 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 135 /* to access nand */ 136 /* at CS0 */ 137 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 138 /* devices */ 139 140 #ifdef CONFIG_CMD_NAND 141 #define CONFIG_CMD_MTDPARTS 142 #define CONFIG_MTD_PARTITIONS 143 #define CONFIG_MTD_DEVICE 144 #define CONFIG_CMD_UBI 145 #define CONFIG_CMD_UBIFS 146 #define CONFIG_RBTREE 147 #define CONFIG_LZO 148 149 #define MTDIDS_DEFAULT "nand0=nand" 150 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(xloader),"\ 151 "1920k(uboot),128k(uboot-env),"\ 152 "10m(boot),-(rootfs)" 153 #else 154 #define MTDPARTS_DEFAULT 155 #endif 156 157 /* Environment information */ 158 #define CONFIG_BOOTDELAY 1 159 160 #define CONFIG_EXTRA_ENV_SETTINGS \ 161 "usbtty=cdc_acm\0" \ 162 "loadaddr=0x82000000\0" \ 163 "bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \ 164 "rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \ 165 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 166 167 #define CONFIG_BOOTCOMMAND \ 168 "if mmc rescan && fatload mmc1 0 ${loadaddr} autoboot.scr || " \ 169 "ext2load mmc1 0 ${loadaddr} autoboot.scr; then " \ 170 "source ${loadaddr}; " \ 171 "fi; " \ 172 "ubi part boot && ubifsmount ubi:boot && " \ 173 "ubifsload ${loadaddr} uImage && bootm ${loadaddr}" 174 175 #define CONFIG_AUTO_COMPLETE 1 176 /* 177 * Miscellaneous configurable options 178 */ 179 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 180 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 181 #define CONFIG_SYS_PROMPT "Pandora # " 182 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 183 /* Print Buffer Size */ 184 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 185 sizeof(CONFIG_SYS_PROMPT) + 16) 186 #define CONFIG_SYS_MAXARGS 16 /* max number of command */ 187 /* args */ 188 /* Boot Argument Buffer Size */ 189 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 190 /* memtest works on */ 191 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 192 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 193 0x01F00000) /* 31MB */ 194 195 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 196 /* address */ 197 198 /* 199 * OMAP3 has 12 GP timers, they can be driven by the system clock 200 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 201 * This rate is divided by a local divisor. 202 */ 203 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 204 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 205 206 /*----------------------------------------------------------------------- 207 * Physical Memory Map 208 */ 209 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 210 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 211 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 212 213 #define CONFIG_SYS_TEXT_BASE 0x80008000 214 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 215 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 216 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 217 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 218 CONFIG_SYS_INIT_RAM_SIZE - \ 219 GENERATED_GBL_DATA_SIZE) 220 221 /*----------------------------------------------------------------------- 222 * FLASH and environment organization 223 */ 224 225 /* **** PISMO SUPPORT *** */ 226 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 227 228 #if defined(CONFIG_CMD_NAND) 229 #define CONFIG_SYS_FLASH_BASE NAND_BASE 230 #endif 231 232 /* Monitor at start of flash */ 233 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 234 235 #define CONFIG_ENV_IS_IN_NAND 1 236 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 237 238 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 239 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 240 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 241 242 #define CONFIG_SYS_CACHELINE_SIZE 64 243 244 #endif /* __CONFIG_H */ 245