1 /* 2 * (C) Copyright 2008-2010 3 * Gražvydas Ignotas <notasas@gmail.com> 4 * 5 * Configuration settings for the OMAP3 Pandora. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * MA 02111-1307 USA 21 */ 22 23 #ifndef __CONFIG_H 24 #define __CONFIG_H 25 26 /* 27 * High Level Configuration Options 28 */ 29 #define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */ 30 #define CONFIG_OMAP 1 /* in a TI OMAP core */ 31 #define CONFIG_OMAP34XX 1 /* which is a 34XX */ 32 #define CONFIG_OMAP3430 1 /* which is in a 3430 */ 33 #define CONFIG_OMAP3_PANDORA 1 /* working with pandora */ 34 35 #define CONFIG_SDRC /* The chip has SDRC controller */ 36 37 #include <asm/arch/cpu.h> /* get chip and board defs */ 38 #include <asm/arch/omap3.h> 39 40 /* 41 * Display CPU and Board information 42 */ 43 #define CONFIG_DISPLAY_CPUINFO 1 44 #define CONFIG_DISPLAY_BOARDINFO 1 45 46 /* Clock Defines */ 47 #define V_OSCK 26000000 /* Clock output from T2 */ 48 #define V_SCLK (V_OSCK >> 1) 49 50 #undef CONFIG_USE_IRQ /* no support for IRQs */ 51 #define CONFIG_MISC_INIT_R 52 53 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 54 #define CONFIG_SETUP_MEMORY_TAGS 1 55 #define CONFIG_INITRD_TAG 1 56 #define CONFIG_REVISION_TAG 1 57 58 #define CONFIG_OF_LIBFDT 1 59 60 /* 61 * Size of malloc() pool 62 */ 63 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 64 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE) 65 66 /* 67 * Hardware drivers 68 */ 69 70 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 71 #define CONFIG_SYS_DEVICE_NULLDEV 1 72 73 /* USB */ 74 #define CONFIG_MUSB_UDC 1 75 #define CONFIG_USB_OMAP3 1 76 #define CONFIG_TWL4030_USB 1 77 78 /* USB device configuration */ 79 #define CONFIG_USB_DEVICE 1 80 #define CONFIG_USB_TTY 1 81 82 /* 83 * NS16550 Configuration 84 */ 85 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 86 87 #define CONFIG_SYS_NS16550 88 #define CONFIG_SYS_NS16550_SERIAL 89 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 90 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 91 92 /* 93 * select serial console configuration 94 */ 95 #define CONFIG_CONS_INDEX 3 96 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 97 #define CONFIG_SERIAL3 3 98 99 /* allow to overwrite serial and ethaddr */ 100 #define CONFIG_ENV_OVERWRITE 101 #define CONFIG_BAUDRATE 115200 102 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ 103 115200} 104 #define CONFIG_MMC 1 105 #define CONFIG_OMAP3_MMC 1 106 #define CONFIG_DOS_PARTITION 1 107 108 /* DDR - I use Micron DDR */ 109 #define CONFIG_OMAP3_MICRON_DDR 1 110 111 /* commands to include */ 112 #include <config_cmd_default.h> 113 114 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 115 #define CONFIG_CMD_FAT /* FAT support */ 116 117 #define CONFIG_CMD_I2C /* I2C serial bus support */ 118 #define CONFIG_CMD_MMC /* MMC support */ 119 #define CONFIG_CMD_NAND /* NAND support */ 120 #define CONFIG_CMD_CACHE /* Cache control */ 121 122 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 123 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 124 #undef CONFIG_CMD_IMI /* iminfo */ 125 #undef CONFIG_CMD_IMLS /* List all found images */ 126 #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ 127 #undef CONFIG_CMD_NFS /* NFS support */ 128 129 #define CONFIG_SYS_NO_FLASH 130 #define CONFIG_HARD_I2C 1 131 #define CONFIG_SYS_I2C_SPEED 100000 132 #define CONFIG_SYS_I2C_SLAVE 1 133 #define CONFIG_SYS_I2C_BUS 0 134 #define CONFIG_SYS_I2C_BUS_SELECT 1 135 #define CONFIG_DRIVER_OMAP34XX_I2C 1 136 137 /* 138 * TWL4030 139 */ 140 #define CONFIG_TWL4030_POWER 1 141 #define CONFIG_TWL4030_LED 1 142 143 /* 144 * Board NAND Info. 145 */ 146 #define CONFIG_NAND_OMAP_GPMC 147 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 148 /* to access nand */ 149 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 150 /* to access nand */ 151 /* at CS0 */ 152 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 153 154 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 155 /* devices */ 156 157 #ifdef CONFIG_CMD_NAND 158 #define CONFIG_CMD_MTDPARTS 159 #define CONFIG_MTD_PARTITIONS 160 #define CONFIG_MTD_DEVICE 161 #define CONFIG_CMD_UBI 162 #define CONFIG_CMD_UBIFS 163 #define CONFIG_RBTREE 164 #define CONFIG_LZO 165 166 #define MTDIDS_DEFAULT "nand0=nand" 167 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(xloader),"\ 168 "1920k(uboot),128k(uboot-env),"\ 169 "10m(boot),-(rootfs)" 170 #else 171 #define MTDPARTS_DEFAULT 172 #endif 173 174 /* Environment information */ 175 #define CONFIG_BOOTDELAY 1 176 177 #define CONFIG_EXTRA_ENV_SETTINGS \ 178 "usbtty=cdc_acm\0" \ 179 "loadaddr=0x82000000\0" \ 180 "bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \ 181 "rw rootflags=bulk_read console=ttyS0,115200n8 " \ 182 "vram=6272K omapfb.vram=0:3000K\0" \ 183 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 184 185 #define CONFIG_BOOTCOMMAND \ 186 "if mmc init && fatload mmc1 0 ${loadaddr} autoboot.scr || " \ 187 "ext2load mmc1 0 ${loadaddr} autoboot.scr; then " \ 188 "source ${loadaddr}; " \ 189 "fi; " \ 190 "ubi part boot && ubifsmount boot && ubifsload ${loadaddr} uImage && bootm ${loadaddr}" 191 192 #define CONFIG_AUTO_COMPLETE 1 193 /* 194 * Miscellaneous configurable options 195 */ 196 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 197 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 198 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 199 #define CONFIG_SYS_PROMPT "Pandora # " 200 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 201 /* Print Buffer Size */ 202 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 203 sizeof(CONFIG_SYS_PROMPT) + 16) 204 #define CONFIG_SYS_MAXARGS 16 /* max number of command */ 205 /* args */ 206 /* Boot Argument Buffer Size */ 207 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 208 /* memtest works on */ 209 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 210 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 211 0x01F00000) /* 31MB */ 212 213 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 214 /* address */ 215 216 /* 217 * OMAP3 has 12 GP timers, they can be driven by the system clock 218 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 219 * This rate is divided by a local divisor. 220 */ 221 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 222 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 223 #define CONFIG_SYS_HZ 1000 224 225 /*----------------------------------------------------------------------- 226 * Stack sizes 227 * 228 * The stack sizes are set up in start.S using the settings below 229 */ 230 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ 231 #ifdef CONFIG_USE_IRQ 232 #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */ 233 #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */ 234 #endif 235 236 /*----------------------------------------------------------------------- 237 * Physical Memory Map 238 */ 239 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 240 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 241 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */ 242 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 243 244 /* SDRAM Bank Allocation method */ 245 #define SDRC_R_B_C 1 246 247 #define CONFIG_SYS_TEXT_BASE 0x80008000 248 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 249 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 250 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 251 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 252 CONFIG_SYS_INIT_RAM_SIZE - \ 253 GENERATED_GBL_DATA_SIZE) 254 255 /*----------------------------------------------------------------------- 256 * FLASH and environment organization 257 */ 258 259 /* **** PISMO SUPPORT *** */ 260 261 /* Configure the PISMO */ 262 #define PISMO1_NAND_SIZE GPMC_SIZE_128M 263 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M 264 265 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 266 267 #if defined(CONFIG_CMD_NAND) 268 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE 269 #endif 270 271 /* Monitor at start of flash */ 272 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 273 274 #define CONFIG_ENV_IS_IN_NAND 1 275 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 276 277 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 278 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 279 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 280 281 #endif /* __CONFIG_H */ 282