1 /* 2 * Configuration settings for the Gumstix Overo board. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_H 8 #define __CONFIG_H 9 10 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 11 #define CONFIG_NAND 12 13 #include <configs/ti_omap3_common.h> 14 /* 15 * We are only ever GP parts and will utilize all of the "downloaded image" 16 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB). 17 */ 18 #undef CONFIG_SPL_TEXT_BASE 19 #define CONFIG_SPL_TEXT_BASE 0x40200000 20 21 #define CONFIG_BCH 22 23 /* Display CPU and Board information */ 24 #define CONFIG_DISPLAY_CPUINFO 25 #define CONFIG_DISPLAY_BOARDINFO 26 27 /* call misc_init_r */ 28 #define CONFIG_MISC_INIT_R 29 30 /* pass the revision tag */ 31 #define CONFIG_REVISION_TAG 32 33 /* override size of malloc() pool */ 34 #undef CONFIG_SYS_MALLOC_LEN 35 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ 36 /* Shift 128 << 15 provides 4 MiB heap to support UBI commands. 37 * Shift 128 << 10 provides 128 KiB heap for limited-memory devices. */ 38 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 15)) 39 40 /* I2C Support */ 41 #define CONFIG_SYS_I2C_OMAP34XX 42 43 /* TWL4030 LED */ 44 #define CONFIG_TWL4030_LED 45 46 /* USB EHCI */ 47 #define CONFIG_USB_EHCI 48 #define CONFIG_USB_EHCI_OMAP 49 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 183 50 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 51 52 /* Initialize GPIOs by default */ 53 #define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 is in GPIO Bank 2 */ 54 #define CONFIG_OMAP3_GPIO_3 /* GPIO64..95 is in GPIO Bank 3 */ 55 #define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO Bank 4 */ 56 #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO Bank 5 */ 57 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO Bank 6 */ 58 59 /* commands to include */ 60 61 #ifdef CONFIG_NAND 62 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */ 63 64 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */ 65 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */ 66 67 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ 68 69 /* NAND block size is 128 KiB. Synchronize these values with 70 * overo_nand_partitions in mach-omap2/board-overo.c in Linux: 71 * xloader 4 * NAND_BLOCK_SIZE = 512 KiB 72 * uboot 14 * NAND_BLOCK_SIZE = 1792 KiB 73 * uboot environtment 2 * NAND_BLOCK_SIZE = 256 KiB 74 * linux 64 * NAND_BLOCK_SIZE = 8 MiB 75 * rootfs remainder 76 */ 77 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 78 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \ 79 "512k(xloader)," \ 80 "1792k(u-boot)," \ 81 "256k(environ)," \ 82 "8m(linux)," \ 83 "-(rootfs)" 84 #else /* CONFIG_NAND */ 85 #define MTDPARTS_DEFAULT 86 #endif /* CONFIG_NAND */ 87 88 /* Board NAND Info. */ 89 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 90 /* to access nand */ 91 /* Environment information */ 92 #define CONFIG_EXTRA_ENV_SETTINGS \ 93 DEFAULT_LINUX_BOOT_ENV \ 94 "bootdir=/boot\0" \ 95 "bootfile=zImage\0" \ 96 "usbtty=cdc_acm\0" \ 97 "console=ttyO2,115200n8\0" \ 98 "mpurate=auto\0" \ 99 "optargs=\0" \ 100 "vram=12M\0" \ 101 "dvimode=1024x768MR-16@60\0" \ 102 "defaultdisplay=dvi\0" \ 103 "mmcdev=0\0" \ 104 "mmcroot=/dev/mmcblk0p2 rw\0" \ 105 "mmcrootfstype=ext4 rootwait\0" \ 106 "nandroot=ubi0:rootfs ubi.mtd=4\0" \ 107 "nandrootfstype=ubifs\0" \ 108 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 109 "mmcargs=setenv bootargs console=${console} " \ 110 "${optargs} " \ 111 "mpurate=${mpurate} " \ 112 "vram=${vram} " \ 113 "omapfb.mode=dvi:${dvimode} " \ 114 "omapdss.def_disp=${defaultdisplay} " \ 115 "root=${mmcroot} " \ 116 "rootfstype=${mmcrootfstype}\0" \ 117 "nandargs=setenv bootargs console=${console} " \ 118 "${optargs} " \ 119 "mpurate=${mpurate} " \ 120 "vram=${vram} " \ 121 "omapfb.mode=dvi:${dvimode} " \ 122 "omapdss.def_disp=${defaultdisplay} " \ 123 "root=${nandroot} " \ 124 "rootfstype=${nandrootfstype}\0" \ 125 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 126 "bootscript=echo Running boot script from mmc ...; " \ 127 "source ${loadaddr}\0" \ 128 "loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ 129 "importbootenv=echo Importing environment from mmc ...; " \ 130 "env import -t ${loadaddr} ${filesize}\0" \ 131 "loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \ 132 "mmcboot=echo Booting from mmc...; " \ 133 "run mmcargs; " \ 134 "bootm ${loadaddr}\0" \ 135 "loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \ 136 "loadfdt=load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \ 137 "loadubizimage=ubifsload ${loadaddr} ${bootdir}/${bootfile}\0" \ 138 "loadubifdt=ubifsload ${fdtaddr} ${bootdir}/${fdtfile}\0" \ 139 "mmcbootfdt=echo Booting with DT from mmc ...; " \ 140 "run mmcargs; " \ 141 "bootz ${loadaddr} - ${fdtaddr}\0" \ 142 "nandboot=echo Booting from nand ...; " \ 143 "run nandargs; " \ 144 "if nand read ${loadaddr} linux; then " \ 145 "bootm ${loadaddr};" \ 146 "fi;\0" \ 147 "nanddtsboot=echo Booting from nand with DTS...; " \ 148 "run nandargs; " \ 149 "ubi part rootfs; "\ 150 "ubifsmount ubi0:rootfs; "\ 151 "run loadubifdt; "\ 152 "run loadubizimage; "\ 153 "bootz ${loadaddr} - ${fdtaddr}\0" \ 154 155 #define CONFIG_BOOTCOMMAND \ 156 "mmc dev ${mmcdev}; if mmc rescan; then " \ 157 "if run loadbootscript; then " \ 158 "run bootscript; " \ 159 "fi;" \ 160 "if run loadbootenv; then " \ 161 "echo Loaded environment from ${bootenv};" \ 162 "run importbootenv;" \ 163 "fi;" \ 164 "if test -n $uenvcmd; then " \ 165 "echo Running uenvcmd ...;" \ 166 "run uenvcmd;" \ 167 "fi;" \ 168 "if run loaduimage; then " \ 169 "run mmcboot;" \ 170 "fi;" \ 171 "if run loadzimage; then " \ 172 "if test -z \"${fdtfile}\"; then " \ 173 "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \ 174 "fi;" \ 175 "if run loadfdt; then " \ 176 "run mmcbootfdt;" \ 177 "fi;" \ 178 "fi;" \ 179 "fi;" \ 180 "run nandboot; " \ 181 "if test -z \"${fdtfile}\"; then "\ 182 "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \ 183 "fi;" \ 184 "run nanddtsboot; " \ 185 186 /* memtest works on */ 187 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 188 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 189 0x01F00000) /* 31MB */ 190 191 /* FLASH and environment organization */ 192 #if defined(CONFIG_NAND) 193 #define CONFIG_SYS_FLASH_BASE NAND_BASE 194 #endif 195 196 /* Monitor at start of flash */ 197 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 198 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 199 200 #define CONFIG_ENV_IS_IN_NAND 201 #define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */ 202 #define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */ 203 204 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 205 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 206 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 207 208 /* Configure SMSC9211 ethernet */ 209 #if defined(CONFIG_CMD_NET) 210 #define CONFIG_SMC911X 211 #define CONFIG_SMC911X_32_BIT 212 #define CONFIG_SMC911X_BASE 0x2C000000 213 #endif /* (CONFIG_CMD_NET) */ 214 215 /* Initial RAM setup */ 216 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 217 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 218 219 /* NAND boot config */ 220 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 221 #define CONFIG_SYS_NAND_MAX_ECCPOS 56 222 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 223 #define CONFIG_SYS_NAND_PAGE_COUNT 64 224 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 225 #define CONFIG_SYS_NAND_OOBSIZE 64 226 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 227 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 228 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \ 229 13, 14, 16, 17, 18, 19, 20, 21, 22, \ 230 23, 24, 25, 26, 27, 28, 30, 31, 32, \ 231 33, 34, 35, 36, 37, 38, 39, 40, 41, \ 232 42, 44, 45, 46, 47, 48, 49, 50, 51, \ 233 52, 53, 54, 55, 56} 234 #define CONFIG_SYS_NAND_ECCSIZE 512 235 #define CONFIG_SYS_NAND_ECCBYTES 13 236 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW 237 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 238 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 239 /* NAND: SPL falcon mode configs */ 240 #ifdef CONFIG_SPL_OS_BOOT 241 #define CONFIG_CMD_SPL_NAND_OFS 0x240000 242 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 243 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 244 #endif 245 246 #endif /* __CONFIG_H */ 247