1 /*
2  * (C) Copyright 2011 Logic Product Development <www.logicpd.com>
3  *	Peter Barada <peter.barada@logicpd.com>
4  *
5  * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
6  * reference boards.
7  *
8  * See file CREDITS for list of people who contributed to this
9  * project.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License as
13  * published by the Free Software Foundation; either version 2 of
14  * the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24  * MA 02111-1307 USA
25  */
26 
27 #ifndef __CONFIG_H
28 #define __CONFIG_H
29 
30 /*
31  * High Level Configuration Options
32  */
33 #define CONFIG_OMAP			/* in a TI OMAP core */
34 #define CONFIG_OMAP34XX			/* which is a 34XX */
35 #define CONFIG_OMAP3_LOGIC		/* working with Logic OMAP boards */
36 
37 #undef CONFIG_USE_IRQ			/* no support for IRQs */
38 
39 #define CONFIG_SYS_TEXT_BASE	0x80400000
40 
41 #define CONFIG_SDRC	/* The chip has SDRC controller */
42 
43 #include <asm/arch/cpu.h>	/* get chip and board defs */
44 #include <asm/arch/omap3.h>
45 
46 /*
47  * Display CPU and Board information
48  */
49 #define CONFIG_DISPLAY_CPUINFO
50 #define CONFIG_DISPLAY_BOARDINFO
51 
52 /* Clock Defines */
53 #define V_OSCK			26000000	/* Clock output from T2 */
54 #define V_SCLK			(V_OSCK >> 1)
55 
56 #define CONFIG_MISC_INIT_R		/* misc_init_r dumps the die id */
57 
58 #define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
59 #define CONFIG_SETUP_MEMORY_TAGS
60 #define CONFIG_INITRD_TAG
61 #define CONFIG_REVISION_TAG
62 
63 #define CONFIG_CMDLINE_EDITING			/* cmd line edit/history */
64 #define CONFIG_ZERO_BOOTDELAY_CHECK		/* check keypress w/no delay */
65 
66 /*
67  * Size of malloc() pool
68  */
69 #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
70 						/* Sector */
71 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10))
72 
73 /*
74  * Hardware drivers
75  */
76 
77 /*
78  * NS16550 Configuration
79  */
80 #define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */
81 
82 #define CONFIG_SYS_NS16550
83 #define CONFIG_SYS_NS16550_SERIAL
84 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
85 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
86 
87 /*
88  * select serial console configuration
89  */
90 #define CONFIG_CONS_INDEX		1
91 #define CONFIG_SYS_NS16550_COM1		OMAP34XX_UART1
92 #define CONFIG_SERIAL1			1	/* UART1 on OMAP Logic boards */
93 
94 /* allow to overwrite serial and ethaddr */
95 #define CONFIG_ENV_OVERWRITE
96 #define CONFIG_BAUDRATE			115200
97 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
98 					115200}
99 #define CONFIG_GENERIC_MMC
100 #define CONFIG_MMC
101 #define CONFIG_OMAP_HSMMC
102 #define CONFIG_DOS_PARTITION
103 
104 /* commands to include */
105 #include <config_cmd_default.h>
106 
107 #define CONFIG_CMD_CACHE
108 #define CONFIG_CMD_EXT2		/* EXT2 Support			*/
109 #define CONFIG_CMD_FAT		/* FAT support			*/
110 #define CONFIG_CMD_JFFS2	/* JFFS2 Support		*/
111 #define CONFIG_CMD_MTDPARTS	/* Enable MTD parts commands */
112 #define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
113 #define MTDIDS_DEFAULT			"nand0=omap2-nand.0"
114 #define MTDPARTS_DEFAULT		"mtdparts=omap2-nand.0:512k(x-loader),"\
115 					"1920k(u-boot),128k(u-boot-env),"\
116 					"4m(kernel),-(fs)"
117 
118 #define CONFIG_CMD_I2C		/* I2C serial bus support	*/
119 #define CONFIG_CMD_MMC		/* MMC support			*/
120 #define CONFIG_CMD_NAND		/* NAND support			*/
121 #define CONFIG_CMD_NAND_LOCK_UNLOCK	/* nand (un)lock commands	*/
122 #define CONFIG_CMD_NET      /* bootp, tftpboot, rarpboot    */
123 #define CONFIG_CMD_PING
124 #define CONFIG_CMD_DHCP
125 #define CONFIG_CMD_SETECPR	/* Evaluate expressions		*/
126 
127 #undef CONFIG_CMD_FLASH		/* flinfo, erase, protect	*/
128 #undef CONFIG_CMD_FPGA		/* FPGA configuration Support	*/
129 #undef CONFIG_CMD_IMI		/* iminfo			*/
130 #undef CONFIG_CMD_IMLS		/* List all found images	*/
131 
132 #define CONFIG_SYS_NO_FLASH
133 
134 /*
135  * I2C
136  */
137 #define CONFIG_HARD_I2C
138 #define CONFIG_DRIVER_OMAP34XX_I2C
139 
140 #define CONFIG_SYS_I2C_SPEED		100000
141 #define CONFIG_SYS_I2C_SLAVE		1
142 #define CONFIG_SYS_I2C_BUS		0
143 #define CONFIG_SYS_I2C_BUS_SELECT	1
144 #define CONFIG_I2C_MULTI_BUS
145 
146 /*
147  * TWL4030
148  */
149 #define CONFIG_TWL4030_POWER
150 
151 /*
152  * Board NAND Info.
153  */
154 #define CONFIG_SYS_NAND_QUIET_TEST
155 #define CONFIG_NAND_OMAP_GPMC
156 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
157 							/* to access nand */
158 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
159 							/* to access nand at */
160 							/* CS0 */
161 
162 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of */
163 							/* NAND devices */
164 #define CONFIG_JFFS2_NAND
165 /* nand device jffs2 lives on */
166 #define CONFIG_JFFS2_DEV		"nand0"
167 /* start of jffs2 partition */
168 #define CONFIG_JFFS2_PART_OFFSET	0x680000
169 #define CONFIG_JFFS2_PART_SIZE		0xf980000	/* size of jffs2 */
170 							/* partition */
171 
172 /* Environment information */
173 #define CONFIG_BOOTDELAY		2
174 
175 /*
176  * PREBOOT assumes the 4.3" display is attached.  User can interrupt
177  * and modify display variable to suit their needs.
178  */
179 #define CONFIG_PREBOOT \
180 	"echo ======================NOTICE============================;"\
181 	"echo \"The u-boot environment is not set.\";"			\
182 	"echo \"If using a display a valid display varible for your panel\";" \
183 	"echo \"needs to be set.\";"					\
184 	"echo \"Valid display options are:\";"				\
185 	"echo \"  2 == LQ121S1DG31     TFT SVGA    (12.1)  Sharp\";"	\
186 	"echo \"  3 == LQ036Q1DA01     TFT QVGA    (3.6)   Sharp w/ASIC\";" \
187 	"echo \"  5 == LQ064D343       TFT VGA     (6.4)   Sharp\";"	\
188 	"echo \"  7 == LQ10D368        TFT VGA     (10.4)  Sharp\";"	\
189 	"echo \" 15 == LQ043T1DG01     TFT WQVGA   (4.3)   Sharp (DEFAULT)\";" \
190 	"echo \" vga[-dvi or -hdmi]    LCD VGA     640x480\";"          \
191 	"echo \" svga[-dvi or -hdmi]   LCD SVGA    800x600\";"          \
192 	"echo \" xga[-dvi or -hdmi]    LCD XGA     1024x768\";"         \
193 	"echo \" 720p[-dvi or -hdmi]   LCD 720P    1280x720\";"         \
194 	"echo \"Defaulting to 4.3 LCD panel (display=15).\";"		\
195 	"setenv display 15;"						\
196 	"setenv preboot;"						\
197 	"saveenv;"
198 
199 
200 #define CONFIG_EXTRA_ENV_SETTINGS \
201 	"loadaddr=0x81000000\0" \
202 	"bootfile=uImage\0" \
203 	"mtdids=" MTDIDS_DEFAULT "\0"	\
204 	"mtdparts=" MTDPARTS_DEFAULT "\0" \
205 	"mmcdev=0\0" \
206 	"autoboot=if mmc rescan ${mmcdev}; then " \
207 			"if run loadbootscript; then " \
208 				"run bootscript; " \
209 			"else " \
210 				"run defaultboot;" \
211 			"fi; " \
212 		"else run defaultboot; fi\0" \
213 	"defaultboot=run mmcramboot\0" \
214 	"consoledevice=ttyO0\0" \
215 	"display=15\0" \
216 	"setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
217 	"dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
218 	"rotation=0\0" \
219 	"vrfb_arg=if itest ${rotation} -ne 0; then " \
220 		"setenv bootargs ${bootargs} omapfb.vrfb=y " \
221 		"omapfb.rotate=${rotation}; " \
222 		"fi\0" \
223 	"otherbootargs=ignore_loglevel early_printk no_console_suspend\0" \
224 	"addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
225 	"common_bootargs=setenv bootargs ${bootargs} display=${display} " \
226 		"${otherbootargs};" \
227 		"run addmtdparts; " \
228 		"run vrfb_arg\0" \
229 	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
230 	"bootscript=echo 'Running bootscript from mmc ...'; " \
231 		"source ${loadaddr}\0" \
232 	"loaduimage=mmc rescan ${mmcdev}; " \
233 		"fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
234 	"ramdisksize=64000\0" \
235 	"ramdiskaddr=0x82000000\0" \
236 	"ramdiskimage=rootfs.ext2.gz.uboot\0" \
237 	"ramargs=run setconsole; setenv bootargs console=${console} " \
238 		"root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
239 	"mmcramboot=echo 'Booting kernel from mmc w/ramdisk...'; " \
240 		"run ramargs; " \
241 		"run common_bootargs; " \
242 		"run dump_bootargs; " \
243 		"run loaduimage; " \
244 		"fatload mmc ${mmcdev} ${ramdiskaddr} ${ramdiskimage}; "\
245 		"bootm ${loadaddr} ${ramdiskaddr}\0" \
246 	"ramboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
247 		"run ramargs; " \
248 		"run common_bootargs; " \
249 		"run dump_bootargs; " \
250 		"tftpboot ${loadaddr} ${bootfile}; "\
251 		"tftpboot ${ramdiskaddr} ${ramdiskimage}; "\
252 		"bootm ${loadaddr} ${ramdiskaddr}\0"
253 
254 #define CONFIG_BOOTCOMMAND \
255 	"run autoboot"
256 
257 #define CONFIG_AUTO_COMPLETE
258 /*
259  * Miscellaneous configurable options
260  */
261 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
262 #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
263 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
264 #define CONFIG_SYS_PROMPT		"OMAP Logic # "
265 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
266 /* Print Buffer Size */
267 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
268 					sizeof(CONFIG_SYS_PROMPT) + 16)
269 #define CONFIG_SYS_MAXARGS		16	/* max number of command args */
270 /* Boot Argument Buffer Size */
271 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
272 /* memtest works on */
273 #define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
274 #define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
275 					0x01F00000) /* 31MB */
276 
277 #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0) /* default load */
278 								/* address */
279 
280 /*
281  * OMAP3 has 12 GP timers, they can be driven by the system clock
282  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
283  * This rate is divided by a local divisor.
284  */
285 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
286 #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
287 #define CONFIG_SYS_HZ			1000
288 
289 /*
290  * Stack sizes
291  *
292  * The stack sizes are set up in start.S using the settings below
293  */
294 #define CONFIG_STACKSIZE	(128 << 10)	/* regular stack 128 KiB */
295 
296 /*
297  * Physical Memory Map
298  */
299 #define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
300 #define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
301 #define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1
302 
303 /*
304  * FLASH and environment organization
305  */
306 
307 /* **** PISMO SUPPORT *** */
308 
309 /* Configure the PISMO */
310 #define PISMO1_NAND_SIZE		GPMC_SIZE_128M
311 
312 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
313 
314 #if defined(CONFIG_CMD_NAND)
315 #define CONFIG_SYS_FLASH_BASE		PISMO1_NAND_BASE
316 #elif defined(CONFIG_CMD_ONENAND)
317 #define CONFIG_SYS_FLASH_BASE		PISMO1_ONEN_BASE
318 #endif
319 
320 /* Monitor at start of flash */
321 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
322 
323 #define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
324 
325 #if defined(CONFIG_CMD_NAND)
326 #define CONFIG_NAND_OMAP_GPMC
327 #define GPMC_NAND_ECC_LP_x16_LAYOUT	1
328 #define CONFIG_ENV_IS_IN_NAND
329 #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
330 #endif
331 
332 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
333 #define CONFIG_ENV_ADDR			CONFIG_ENV_OFFSET
334 
335 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
336 #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
337 #define CONFIG_SYS_INIT_RAM_SIZE	0x800
338 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
339 					 CONFIG_SYS_INIT_RAM_SIZE - \
340 					 GENERATED_GBL_DATA_SIZE)
341 
342 /*
343  * SMSC922x Ethernet
344  */
345 #if defined(CONFIG_CMD_NET)
346 
347 #define CONFIG_SMC911X
348 #define CONFIG_SMC911X_16_BIT
349 #define CONFIG_SMC911X_BASE	0x08000000
350 
351 #endif /* (CONFIG_CMD_NET) */
352 
353 /*
354  * BOOTP fields
355  */
356 
357 #define CONFIG_BOOTP_SUBNETMASK		0x00000001
358 #define CONFIG_BOOTP_GATEWAY		0x00000002
359 #define CONFIG_BOOTP_HOSTNAME		0x00000004
360 #define CONFIG_BOOTP_BOOTPATH		0x00000010
361 
362 #endif /* __CONFIG_H */
363