1 /* 2 * (C) Copyright 2011 Logic Product Development <www.logicpd.com> 3 * Peter Barada <peter.barada@logicpd.com> 4 * 5 * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo 6 * reference boards. 7 * 8 * See file CREDITS for list of people who contributed to this 9 * project. 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of 14 * the License, or (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24 * MA 02111-1307 USA 25 */ 26 27 #ifndef __CONFIG_H 28 #define __CONFIG_H 29 30 /* 31 * High Level Configuration Options 32 */ 33 #define CONFIG_OMAP /* in a TI OMAP core */ 34 #define CONFIG_OMAP34XX /* which is a 34XX */ 35 #define CONFIG_OMAP3_LOGIC /* working with Logic OMAP boards */ 36 #define CONFIG_OMAP_GPIO 37 38 #define CONFIG_SYS_TEXT_BASE 0x80400000 39 40 #define CONFIG_SDRC /* The chip has SDRC controller */ 41 42 #include <asm/arch/cpu.h> /* get chip and board defs */ 43 #include <asm/arch/omap3.h> 44 45 /* 46 * Display CPU and Board information 47 */ 48 #define CONFIG_DISPLAY_CPUINFO 49 #define CONFIG_DISPLAY_BOARDINFO 50 51 /* Clock Defines */ 52 #define V_OSCK 26000000 /* Clock output from T2 */ 53 #define V_SCLK (V_OSCK >> 1) 54 55 #define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */ 56 57 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 58 #define CONFIG_SETUP_MEMORY_TAGS 59 #define CONFIG_INITRD_TAG 60 #define CONFIG_REVISION_TAG 61 62 #define CONFIG_CMDLINE_EDITING /* cmd line edit/history */ 63 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check keypress w/no delay */ 64 65 /* 66 * Size of malloc() pool 67 */ 68 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 69 /* Sector */ 70 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 71 72 /* 73 * Hardware drivers 74 */ 75 76 /* 77 * NS16550 Configuration 78 */ 79 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 80 81 #define CONFIG_SYS_NS16550 82 #define CONFIG_SYS_NS16550_SERIAL 83 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 84 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 85 86 /* 87 * select serial console configuration 88 */ 89 #define CONFIG_CONS_INDEX 1 90 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 91 #define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */ 92 93 /* allow to overwrite serial and ethaddr */ 94 #define CONFIG_ENV_OVERWRITE 95 #define CONFIG_BAUDRATE 115200 96 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 97 115200} 98 #define CONFIG_GENERIC_MMC 99 #define CONFIG_MMC 100 #define CONFIG_OMAP_HSMMC 101 #define CONFIG_DOS_PARTITION 102 103 /* commands to include */ 104 #include <config_cmd_default.h> 105 106 #define CONFIG_CMD_CACHE 107 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 108 #define CONFIG_CMD_FAT /* FAT support */ 109 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ 110 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 111 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 112 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 113 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(x-loader),"\ 114 "1920k(u-boot),128k(u-boot-env),"\ 115 "4m(kernel),-(fs)" 116 117 #define CONFIG_CMD_I2C /* I2C serial bus support */ 118 #define CONFIG_CMD_MMC /* MMC support */ 119 #define CONFIG_CMD_NAND /* NAND support */ 120 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ 121 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ 122 #define CONFIG_CMD_PING 123 #define CONFIG_CMD_DHCP 124 #define CONFIG_CMD_SETEXPR /* Evaluate expressions */ 125 126 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 127 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 128 #undef CONFIG_CMD_IMI /* iminfo */ 129 #undef CONFIG_CMD_IMLS /* List all found images */ 130 131 #define CONFIG_SYS_NO_FLASH 132 133 /* 134 * I2C 135 */ 136 #define CONFIG_HARD_I2C 137 #define CONFIG_DRIVER_OMAP34XX_I2C 138 139 #define CONFIG_SYS_I2C_SPEED 100000 140 #define CONFIG_SYS_I2C_SLAVE 1 141 #define CONFIG_SYS_I2C_BUS 0 142 #define CONFIG_SYS_I2C_BUS_SELECT 1 143 #define CONFIG_I2C_MULTI_BUS 144 145 /* 146 * TWL4030 147 */ 148 #define CONFIG_TWL4030_POWER 149 150 /* 151 * Board NAND Info. 152 */ 153 #define CONFIG_SYS_NAND_QUIET_TEST 154 #define CONFIG_NAND_OMAP_GPMC 155 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 156 /* to access nand */ 157 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 158 /* to access nand at */ 159 /* CS0 */ 160 161 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 162 /* NAND devices */ 163 #define CONFIG_JFFS2_NAND 164 /* nand device jffs2 lives on */ 165 #define CONFIG_JFFS2_DEV "nand0" 166 /* start of jffs2 partition */ 167 #define CONFIG_JFFS2_PART_OFFSET 0x680000 168 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ 169 /* partition */ 170 171 /* Environment information */ 172 #define CONFIG_BOOTDELAY 2 173 174 /* 175 * PREBOOT assumes the 4.3" display is attached. User can interrupt 176 * and modify display variable to suit their needs. 177 */ 178 #define CONFIG_PREBOOT \ 179 "echo ======================NOTICE============================;"\ 180 "echo \"The u-boot environment is not set.\";" \ 181 "echo \"If using a display a valid display varible for your panel\";" \ 182 "echo \"needs to be set.\";" \ 183 "echo \"Valid display options are:\";" \ 184 "echo \" 2 == LQ121S1DG31 TFT SVGA (12.1) Sharp\";" \ 185 "echo \" 3 == LQ036Q1DA01 TFT QVGA (3.6) Sharp w/ASIC\";" \ 186 "echo \" 5 == LQ064D343 TFT VGA (6.4) Sharp\";" \ 187 "echo \" 7 == LQ10D368 TFT VGA (10.4) Sharp\";" \ 188 "echo \" 15 == LQ043T1DG01 TFT WQVGA (4.3) Sharp (DEFAULT)\";" \ 189 "echo \" vga[-dvi or -hdmi] LCD VGA 640x480\";" \ 190 "echo \" svga[-dvi or -hdmi] LCD SVGA 800x600\";" \ 191 "echo \" xga[-dvi or -hdmi] LCD XGA 1024x768\";" \ 192 "echo \" 720p[-dvi or -hdmi] LCD 720P 1280x720\";" \ 193 "echo \"Defaulting to 4.3 LCD panel (display=15).\";" \ 194 "setenv display 15;" \ 195 "setenv preboot;" \ 196 "saveenv;" 197 198 199 #define CONFIG_EXTRA_ENV_SETTINGS \ 200 "loadaddr=0x81000000\0" \ 201 "bootfile=uImage\0" \ 202 "mtdids=" MTDIDS_DEFAULT "\0" \ 203 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 204 "mmcdev=0\0" \ 205 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ 206 "if run loadbootscript; then " \ 207 "run bootscript; " \ 208 "else " \ 209 "run defaultboot;" \ 210 "fi; " \ 211 "else run defaultboot; fi\0" \ 212 "defaultboot=run mmcramboot\0" \ 213 "consoledevice=ttyO0\0" \ 214 "display=15\0" \ 215 "setconsole=setenv console ${consoledevice},${baudrate}n8\0" \ 216 "dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \ 217 "rotation=0\0" \ 218 "vrfb_arg=if itest ${rotation} -ne 0; then " \ 219 "setenv bootargs ${bootargs} omapfb.vrfb=y " \ 220 "omapfb.rotate=${rotation}; " \ 221 "fi\0" \ 222 "otherbootargs=ignore_loglevel early_printk no_console_suspend\0" \ 223 "addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \ 224 "common_bootargs=setenv bootargs ${bootargs} display=${display} " \ 225 "${otherbootargs};" \ 226 "run addmtdparts; " \ 227 "run vrfb_arg\0" \ 228 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 229 "bootscript=echo 'Running bootscript from mmc ...'; " \ 230 "source ${loadaddr}\0" \ 231 "loaduimage=mmc rescan ${mmcdev}; " \ 232 "fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \ 233 "ramdisksize=64000\0" \ 234 "ramdiskaddr=0x82000000\0" \ 235 "ramdiskimage=rootfs.ext2.gz.uboot\0" \ 236 "ramargs=run setconsole; setenv bootargs console=${console} " \ 237 "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \ 238 "mmcramboot=echo 'Booting kernel from mmc w/ramdisk...'; " \ 239 "run ramargs; " \ 240 "run common_bootargs; " \ 241 "run dump_bootargs; " \ 242 "run loaduimage; " \ 243 "fatload mmc ${mmcdev} ${ramdiskaddr} ${ramdiskimage}; "\ 244 "bootm ${loadaddr} ${ramdiskaddr}\0" \ 245 "ramboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \ 246 "run ramargs; " \ 247 "run common_bootargs; " \ 248 "run dump_bootargs; " \ 249 "tftpboot ${loadaddr} ${bootfile}; "\ 250 "tftpboot ${ramdiskaddr} ${ramdiskimage}; "\ 251 "bootm ${loadaddr} ${ramdiskaddr}\0" 252 253 #define CONFIG_BOOTCOMMAND \ 254 "run autoboot" 255 256 #define CONFIG_AUTO_COMPLETE 257 /* 258 * Miscellaneous configurable options 259 */ 260 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 261 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 262 #define CONFIG_SYS_PROMPT "OMAP Logic # " 263 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 264 /* Print Buffer Size */ 265 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 266 sizeof(CONFIG_SYS_PROMPT) + 16) 267 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 268 /* Boot Argument Buffer Size */ 269 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 270 /* memtest works on */ 271 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 272 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 273 0x01F00000) /* 31MB */ 274 275 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 276 /* address */ 277 278 /* 279 * OMAP3 has 12 GP timers, they can be driven by the system clock 280 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 281 * This rate is divided by a local divisor. 282 */ 283 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 284 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 285 #define CONFIG_SYS_HZ 1000 286 287 /* 288 * Physical Memory Map 289 */ 290 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 291 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 292 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 293 294 /* 295 * FLASH and environment organization 296 */ 297 298 /* **** PISMO SUPPORT *** */ 299 300 /* Configure the PISMO */ 301 #define PISMO1_NAND_SIZE GPMC_SIZE_128M 302 303 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 304 305 #if defined(CONFIG_CMD_NAND) 306 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE 307 #elif defined(CONFIG_CMD_ONENAND) 308 #define CONFIG_SYS_FLASH_BASE PISMO1_ONEN_BASE 309 #endif 310 311 /* Monitor at start of flash */ 312 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 313 314 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 315 316 #if defined(CONFIG_CMD_NAND) 317 #define CONFIG_NAND_OMAP_GPMC 318 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 319 #define CONFIG_ENV_IS_IN_NAND 320 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 321 #endif 322 323 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 324 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET 325 326 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 327 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 328 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 329 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 330 CONFIG_SYS_INIT_RAM_SIZE - \ 331 GENERATED_GBL_DATA_SIZE) 332 333 /* 334 * SMSC922x Ethernet 335 */ 336 #if defined(CONFIG_CMD_NET) 337 338 #define CONFIG_SMC911X 339 #define CONFIG_SMC911X_16_BIT 340 #define CONFIG_SMC911X_BASE 0x08000000 341 342 #endif /* (CONFIG_CMD_NET) */ 343 344 /* 345 * BOOTP fields 346 */ 347 348 #define CONFIG_BOOTP_SUBNETMASK 0x00000001 349 #define CONFIG_BOOTP_GATEWAY 0x00000002 350 #define CONFIG_BOOTP_HOSTNAME 0x00000004 351 #define CONFIG_BOOTP_BOOTPATH 0x00000010 352 353 #endif /* __CONFIG_H */ 354