1 /* 2 * (C) Copyright 2011 Logic Product Development <www.logicpd.com> 3 * Peter Barada <peter.barada@logicpd.com> 4 * 5 * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo 6 * reference boards. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_H 12 #define __CONFIG_H 13 14 /* High Level Configuration Options */ 15 16 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 17 18 #include <configs/ti_omap3_common.h> 19 20 #ifdef CONFIG_SPL_BUILD 21 /* 22 * Disable MMC DM for SPL build and can be re-enabled after adding 23 * DM support in SPL 24 */ 25 #undef CONFIG_DM_MMC 26 #undef CONFIG_DM_MMC_OPS 27 #undef OMAP_HSMMC_USE_GPIO 28 29 /* select serial console configuration for SPL */ 30 #undef CONFIG_CONS_INDEX 31 #define CONFIG_CONS_INDEX 1 32 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 33 #endif 34 35 36 /* 37 * We are only ever GP parts and will utilize all of the "downloaded image" 38 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in 39 * order to allow for BCH8 to fit in. 40 */ 41 #undef CONFIG_SPL_TEXT_BASE 42 #define CONFIG_SPL_FRAMEWORK 43 #define CONFIG_SPL_TEXT_BASE 0x40200000 44 45 #define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */ 46 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 47 #define CONFIG_SETUP_MEMORY_TAGS 48 #define CONFIG_INITRD_TAG 49 #define CONFIG_REVISION_TAG 50 51 /* Hardware drivers */ 52 53 #define CONFIG_USB_OMAP3 54 55 /* commands to include */ 56 #define CONFIG_CMD_NAND 57 #define CONFIG_CMD_MTDPARTS 58 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ 59 60 /* I2C */ 61 #define CONFIG_SYS_I2C_OMAP34XX 62 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */ 63 64 /* USB */ 65 #define CONFIG_USB_MUSB_OMAP2PLUS 66 #define CONFIG_USB_MUSB_PIO_ONLY 67 #define CONFIG_USB_ETHER 68 #define CONFIG_USB_ETHER_RNDIS 69 #define CONFIG_USB_FUNCTION_FASTBOOT 70 #define CONFIG_CMD_FASTBOOT 71 #define CONFIG_ANDROID_BOOT_IMAGE 72 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR 73 #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 74 75 /* TWL4030 */ 76 #define CONFIG_TWL4030_PWM 77 #define CONFIG_TWL4030_USB 78 79 /* Board NAND Info. */ 80 #ifdef CONFIG_NAND 81 #define CONFIG_NAND_OMAP_GPMC 82 83 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */ 84 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */ 85 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */ 86 87 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 88 /* to access nand */ 89 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 90 /* NAND devices */ 91 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 92 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 93 #define CONFIG_SYS_NAND_PAGE_COUNT 64 94 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 95 #define CONFIG_SYS_NAND_OOBSIZE 64 96 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 97 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 98 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \ 99 13, 14, 16, 17, 18, 19, 20, 21, 22, \ 100 23, 24, 25, 26, 27, 28, 30, 31, 32, \ 101 33, 34, 35, 36, 37, 38, 39, 40, 41, \ 102 42, 44, 45, 46, 47, 48, 49, 50, 51, \ 103 52, 53, 54, 55, 56} 104 105 #define CONFIG_SYS_NAND_ECCSIZE 512 106 #define CONFIG_SYS_NAND_ECCBYTES 13 107 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW 108 #define CONFIG_BCH 109 #define CONFIG_SYS_NAND_MAX_OOBFREE 2 110 #define CONFIG_SYS_NAND_MAX_ECCPOS 56 111 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 112 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 113 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ 114 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 115 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"\ 116 "512k(MLO),"\ 117 "1792k(u-boot),"\ 118 "128k(spl-os)," \ 119 "128k(u-boot-env),"\ 120 "6m(kernel),-(fs)" 121 #endif 122 123 /* Environment information */ 124 125 #define CONFIG_PREBOOT \ 126 "setenv preboot;" \ 127 "nand unlock;" \ 128 "saveenv;" 129 130 #define CONFIG_EXTRA_ENV_SETTINGS \ 131 DEFAULT_LINUX_BOOT_ENV \ 132 "mtdids=" MTDIDS_DEFAULT "\0" \ 133 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 134 "mmcdev=0\0" \ 135 "mmcroot=/dev/mmcblk0p2 rw\0" \ 136 "mmcrootfstype=ext4 rootwait\0" \ 137 "nandroot=ubi0:rootfs rw ubi.mtd=fs noinitrd\0" \ 138 "nandrootfstype=ubifs rootwait\0" \ 139 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ 140 "if run loadbootscript; then " \ 141 "run bootscript; " \ 142 "else " \ 143 "run defaultboot;" \ 144 "fi; " \ 145 "else run defaultboot; fi\0" \ 146 "defaultboot=run mmcramboot\0" \ 147 "consoledevice=ttyO0\0" \ 148 "setconsole=setenv console ${consoledevice},${baudrate}n8\0" \ 149 "dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \ 150 "rotation=0\0" \ 151 "vrfb_arg=if itest ${rotation} -ne 0; then " \ 152 "setenv bootargs ${bootargs} omapfb.vrfb=y " \ 153 "omapfb.rotate=${rotation}; " \ 154 "fi\0" \ 155 "optargs=ignore_loglevel early_printk no_console_suspend\0" \ 156 "common_bootargs=run setconsole; setenv bootargs " \ 157 "${bootargs} "\ 158 "console=${console} " \ 159 "${mtdparts} "\ 160 "${optargs}; " \ 161 "run vrfb_arg\0" \ 162 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 163 "bootscript=echo 'Running bootscript from mmc ...'; " \ 164 "source ${loadaddr}\0" \ 165 "loadimage=mmc rescan; " \ 166 "load mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \ 167 "ramdisksize=64000\0" \ 168 "ramdiskimage=rootfs.ext2.gz.uboot\0" \ 169 "loadramdisk=mmc rescan; " \ 170 "load mmc ${mmcdev} ${rdaddr} ${ramdiskimage}\0" \ 171 "ramargs=setenv bootargs "\ 172 "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \ 173 "mmcargs=setenv bootargs "\ 174 "root=${mmcroot} rootfstype=${mmcrootfstype}\0" \ 175 "nandargs=setenv bootargs "\ 176 "root=${nandroot} " \ 177 "rootfstype=${nandrootfstype}\0" \ 178 "nfsargs=setenv serverip ${tftpserver}; " \ 179 "setenv bootargs root=/dev/nfs " \ 180 "nfsroot=${nfsrootpath} " \ 181 "ip=${ipaddr}:${tftpserver}:${gatewayip}:${netmask}::eth0:off\0" \ 182 "nfsrootpath=/opt/nfs-exports/omap\0" \ 183 "autoload=no\0" \ 184 "loadfdt=mmc rescan; " \ 185 "load mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \ 186 "mmcbootcommon=echo Booting with DT from mmc${mmcdev} ...; " \ 187 "run mmcargs; " \ 188 "run common_bootargs; " \ 189 "run dump_bootargs; " \ 190 "run loadimage; " \ 191 "run loadfdt;\0 " \ 192 "mmcbootz=setenv bootfile zImage; " \ 193 "run mmcbootcommon; "\ 194 "bootz ${loadaddr} - ${fdtaddr}\0" \ 195 "mmcboot=setenv bootfile uImage; "\ 196 "run mmcbootcommon; "\ 197 "bootm ${loadaddr} - ${fdtaddr}\0" \ 198 "mmcrambootcommon=echo 'Booting kernel from MMC w/ramdisk...'; " \ 199 "run ramargs; " \ 200 "run common_bootargs; " \ 201 "run dump_bootargs; " \ 202 "run loadimage; " \ 203 "run loadfdt; " \ 204 "run loadramdisk\0" \ 205 "mmcramboot=setenv bootfile uImage; " \ 206 "run mmcrambootcommon; " \ 207 "bootm ${loadaddr} ${rdaddr} ${fdtimage}\0" \ 208 "mmcrambootz=setenv bootfile zImage; " \ 209 "run mmcrambootcommon; " \ 210 "bootz ${loadaddr} ${rdaddr} ${fdtimage}\0" \ 211 "tftpboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \ 212 "run ramargs; " \ 213 "run common_bootargs; " \ 214 "run dump_bootargs; " \ 215 "tftpboot ${loadaddr} ${zimage}; " \ 216 "tftpboot ${rdaddr} ${ramdiskimage}; " \ 217 "bootm ${loadaddr} ${rdaddr}\0" \ 218 "tftpbootz=echo 'Booting kernel NFS rootfs...'; " \ 219 "dhcp;" \ 220 "run nfsargs;" \ 221 "run common_bootargs;" \ 222 "run dump_bootargs;" \ 223 "tftpboot $loadaddr zImage;" \ 224 "bootz $loadaddr\0" \ 225 "nandbootcommon=echo 'Booting kernel from NAND...';" \ 226 "nand unlock;" \ 227 "run nandargs;" \ 228 "run common_bootargs;" \ 229 "run dump_bootargs;" \ 230 "nand read ${loadaddr} kernel;" \ 231 "nand read ${fdtaddr} spl-os;\0" \ 232 "nandbootz=run nandbootcommon; "\ 233 "bootz ${loadaddr} - ${fdtaddr}\0"\ 234 "nandboot=run nandbootcommon; "\ 235 "bootm ${loadaddr} - ${fdtaddr}\0"\ 236 237 #define CONFIG_BOOTCOMMAND \ 238 "run autoboot" 239 240 /* Miscellaneous configurable options */ 241 242 /* memtest works on */ 243 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 244 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 245 0x01F00000) /* 31MB */ 246 247 /* FLASH and environment organization */ 248 249 /* **** PISMO SUPPORT *** */ 250 #if defined(CONFIG_CMD_NAND) 251 #define CONFIG_SYS_FLASH_BASE NAND_BASE 252 #endif 253 254 /* Monitor at start of flash */ 255 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 256 257 #define CONFIG_ENV_IS_IN_NAND 1 258 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 259 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 260 261 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 262 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 263 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 264 265 /* SMSC922x Ethernet */ 266 #if defined(CONFIG_CMD_NET) 267 #define CONFIG_SMC911X 268 #define CONFIG_SMC911X_32_BIT 269 #define CONFIG_SMC911X_BASE 0x08000000 270 #endif /* (CONFIG_CMD_NET) */ 271 272 /* Defines for SPL */ 273 274 #define CONFIG_SPL_OMAP3_ID_NAND 275 276 /* NAND: SPL falcon mode configs */ 277 #ifdef CONFIG_SPL_OS_BOOT 278 #define CONFIG_CMD_SPL_NAND_OFS 0x240000 279 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 280 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 281 #endif 282 283 #endif /* __CONFIG_H */ 284