1 /* 2 * (C) Copyright 2011 Logic Product Development <www.logicpd.com> 3 * Peter Barada <peter.barada@logicpd.com> 4 * 5 * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo 6 * reference boards. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_H 12 #define __CONFIG_H 13 14 /* High Level Configuration Options */ 15 16 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 17 18 /* 19 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 20 * 64 bytes before this address should be set aside for u-boot.img's 21 * header. That is 0x800FFFC0--0x80100000 should not be used for any 22 * other needs. We use this rather than the inherited defines from 23 * ti_armv7_common.h for backwards compatibility. 24 */ 25 #define CONFIG_SYS_TEXT_BASE 0x80100000 26 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 27 #define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */ 28 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 29 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 30 31 #include <configs/ti_omap3_common.h> 32 33 /* 34 * We are only ever GP parts and will utilize all of the "downloaded image" 35 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in 36 * order to allow for BCH8 to fit in. 37 */ 38 #undef CONFIG_SPL_TEXT_BASE 39 #define CONFIG_SPL_TEXT_BASE 0x40200000 40 41 #define CONFIG_BOARD_LATE_INIT 42 #define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */ 43 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 44 #define CONFIG_SETUP_MEMORY_TAGS 45 #define CONFIG_INITRD_TAG 46 #define CONFIG_REVISION_TAG 47 #define CONFIG_CMDLINE_EDITING /* cmd line edit/history */ 48 49 /* Hardware drivers */ 50 51 /* GPIO banks */ 52 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */ 53 54 #define CONFIG_USB_OMAP3 55 56 /* select serial console configuration */ 57 #undef CONFIG_CONS_INDEX 58 #define CONFIG_CONS_INDEX 1 59 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 60 #define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */ 61 62 /* commands to include */ 63 #define CONFIG_CMD_NAND 64 #define CONFIG_CMD_MTDPARTS 65 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ 66 67 /* I2C */ 68 #define CONFIG_SYS_I2C_OMAP34XX 69 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */ 70 #define EXPANSION_EEPROM_I2C_BUS 2 /* I2C Bus for AT24C64 */ 71 #define CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID 72 73 /* USB */ 74 #define CONFIG_USB_MUSB_OMAP2PLUS 75 #define CONFIG_USB_MUSB_PIO_ONLY 76 #define CONFIG_USB_ETHER 77 #define CONFIG_USB_ETHER_RNDIS 78 #define CONFIG_USB_FUNCTION_FASTBOOT 79 #define CONFIG_CMD_FASTBOOT 80 #define CONFIG_ANDROID_BOOT_IMAGE 81 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR 82 #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 83 84 /* TWL4030 */ 85 #define CONFIG_TWL4030_PWM 86 #define CONFIG_TWL4030_USB 87 88 /* Board NAND Info. */ 89 #ifdef CONFIG_NAND 90 #define CONFIG_NAND_OMAP_GPMC 91 92 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */ 93 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */ 94 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */ 95 96 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 97 /* to access nand */ 98 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 99 /* NAND devices */ 100 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 101 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 102 #define CONFIG_SYS_NAND_PAGE_COUNT 64 103 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 104 #define CONFIG_SYS_NAND_OOBSIZE 64 105 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 106 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 107 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \ 108 13, 14, 16, 17, 18, 19, 20, 21, 22, \ 109 23, 24, 25, 26, 27, 28, 30, 31, 32, \ 110 33, 34, 35, 36, 37, 38, 39, 40, 41, \ 111 42, 44, 45, 46, 47, 48, 49, 50, 51, \ 112 52, 53, 54, 55, 56} 113 114 #define CONFIG_SYS_NAND_ECCSIZE 512 115 #define CONFIG_SYS_NAND_ECCBYTES 13 116 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW 117 #define CONFIG_BCH 118 #define CONFIG_SYS_NAND_MAX_OOBFREE 2 119 #define CONFIG_SYS_NAND_MAX_ECCPOS 56 120 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 121 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 122 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ 123 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 124 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO),"\ 125 "1920k(u-boot),128k(u-boot-env),"\ 126 "4m(kernel),-(fs)" 127 #endif 128 129 /* Environment information */ 130 131 /* 132 * PREBOOT assumes the 4.3" display is attached. User can interrupt 133 * and modify display variable to suit their needs. 134 */ 135 #define CONFIG_PREBOOT \ 136 "echo ======================NOTICE============================;"\ 137 "echo \"The u-boot environment is not set.\";" \ 138 "echo \"If using a display a valid display variable for your panel\";" \ 139 "echo \"needs to be set.\";" \ 140 "echo \"Valid display options are:\";" \ 141 "echo \" 2 == LQ121S1DG31 TFT SVGA (12.1) Sharp\";" \ 142 "echo \" 3 == LQ036Q1DA01 TFT QVGA (3.6) Sharp w/ASIC\";" \ 143 "echo \" 5 == LQ064D343 TFT VGA (6.4) Sharp\";" \ 144 "echo \" 7 == LQ10D368 TFT VGA (10.4) Sharp\";" \ 145 "echo \" 15 == LQ043T1DG01 TFT WQVGA (4.3) Sharp (DEFAULT)\";" \ 146 "echo \" vga[-dvi or -hdmi] LCD VGA 640x480\";" \ 147 "echo \" svga[-dvi or -hdmi] LCD SVGA 800x600\";" \ 148 "echo \" xga[-dvi or -hdmi] LCD XGA 1024x768\";" \ 149 "echo \" 720p[-dvi or -hdmi] LCD 720P 1280x720\";" \ 150 "echo \"Defaulting to 4.3 LCD panel (display=15).\";" \ 151 "setenv display 15;" \ 152 "setenv preboot;" \ 153 "nand unlock;" \ 154 "saveenv;" 155 156 #define CONFIG_EXTRA_ENV_SETTINGS \ 157 "loadaddr=0x81000000\0" \ 158 "uimage=uImage\0" \ 159 "zimage=zImage\0" \ 160 "mtdids=" MTDIDS_DEFAULT "\0" \ 161 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 162 "mmcdev=0\0" \ 163 "mmcroot=/dev/mmcblk0p2 rw\0" \ 164 "mmcrootfstype=ext4 rootwait\0" \ 165 "nandroot=ubi0:rootfs rw ubi.mtd=fs noinitrd\0" \ 166 "nandrootfstype=ubifs rootwait\0" \ 167 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ 168 "if run loadbootscript; then " \ 169 "run bootscript; " \ 170 "else " \ 171 "run defaultboot;" \ 172 "fi; " \ 173 "else run defaultboot; fi\0" \ 174 "defaultboot=run mmcramboot\0" \ 175 "consoledevice=ttyO0\0" \ 176 "display=15\0" \ 177 "setconsole=setenv console ${consoledevice},${baudrate}n8\0" \ 178 "dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \ 179 "rotation=0\0" \ 180 "vrfb_arg=if itest ${rotation} -ne 0; then " \ 181 "setenv bootargs ${bootargs} omapfb.vrfb=y " \ 182 "omapfb.rotate=${rotation}; " \ 183 "fi\0" \ 184 "optargs=ignore_loglevel early_printk no_console_suspend\0" \ 185 "addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \ 186 "common_bootargs=setenv bootargs ${bootargs} display=${display} " \ 187 "${optargs};" \ 188 "run addmtdparts; " \ 189 "run vrfb_arg\0" \ 190 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 191 "bootscript=echo 'Running bootscript from mmc ...'; " \ 192 "source ${loadaddr}\0" \ 193 "loaduimage=mmc rescan; " \ 194 "fatload mmc ${mmcdev} ${loadaddr} ${uimage}\0" \ 195 "loadzimage=mmc rescan; " \ 196 "fatload mmc ${mmcdev} ${loadaddr} ${zimage}\0" \ 197 "ramdisksize=64000\0" \ 198 "ramdiskaddr=0x82000000\0" \ 199 "ramdiskimage=rootfs.ext2.gz.uboot\0" \ 200 "loadramdisk=mmc rescan; " \ 201 "fatload mmc ${mmcdev} ${ramdiskaddr} ${ramdiskimage}\0" \ 202 "ramargs=run setconsole; setenv bootargs console=${console} " \ 203 "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \ 204 "mmcargs=run setconsole; setenv bootargs console=${console} " \ 205 "${optargs} " \ 206 "root=${mmcroot} " \ 207 "rootfstype=${mmcrootfstype}\0" \ 208 "nandargs=run setconsole; setenv bootargs console=${console} " \ 209 "${optargs} " \ 210 "root=${nandroot} " \ 211 "rootfstype=${nandrootfstype}\0" \ 212 "fdtaddr=0x86000000\0" \ 213 "loadfdtimage=mmc rescan; " \ 214 "fatload mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \ 215 "mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \ 216 "run mmcargs; " \ 217 "run common_bootargs; " \ 218 "run dump_bootargs; " \ 219 "run loadzimage; " \ 220 "run loadfdtimage; " \ 221 "bootz ${loadaddr} - ${fdtaddr}\0" \ 222 "mmcramboot=echo 'Booting uImage kernel from mmc w/ramdisk...'; " \ 223 "run ramargs; " \ 224 "run common_bootargs; " \ 225 "run dump_bootargs; " \ 226 "run loaduimage; " \ 227 "run loadramdisk; " \ 228 "bootm ${loadaddr} ${ramdiskaddr}\0" \ 229 "mmcrambootz=echo 'Booting zImage kernel from mmc w/ramdisk...'; " \ 230 "run ramargs; " \ 231 "run common_bootargs; " \ 232 "run dump_bootargs; " \ 233 "run loadzimage; " \ 234 "run loadramdisk; " \ 235 "run loadfdtimage; " \ 236 "bootz ${loadaddr} ${ramdiskaddr} ${fdtaddr}\0; " \ 237 "tftpboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \ 238 "run ramargs; " \ 239 "run common_bootargs; " \ 240 "run dump_bootargs; " \ 241 "tftpboot ${loadaddr} ${uimage}; " \ 242 "tftpboot ${ramdiskaddr} ${ramdiskimage}; " \ 243 "bootm ${loadaddr} ${ramdiskaddr}\0" 244 245 #define CONFIG_BOOTCOMMAND \ 246 "run autoboot" 247 248 /* Miscellaneous configurable options */ 249 #define CONFIG_AUTO_COMPLETE 250 251 /* memtest works on */ 252 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 253 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 254 0x01F00000) /* 31MB */ 255 256 /* FLASH and environment organization */ 257 258 /* **** PISMO SUPPORT *** */ 259 #if defined(CONFIG_CMD_NAND) 260 #define CONFIG_SYS_FLASH_BASE NAND_BASE 261 #elif defined(CONFIG_CMD_ONENAND) 262 #define CONFIG_SYS_FLASH_BASE ONENAND_MAP 263 #endif 264 265 /* Monitor at start of flash */ 266 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 267 268 #define CONFIG_ENV_IS_IN_NAND 1 269 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 270 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ 271 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 272 273 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 274 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 275 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 276 277 /* SMSC922x Ethernet */ 278 #if defined(CONFIG_CMD_NET) 279 #define CONFIG_SMC911X 280 #define CONFIG_SMC911X_32_BIT 281 #define CONFIG_SMC911X_BASE 0x08000000 282 #endif /* (CONFIG_CMD_NET) */ 283 284 /* Defines for SPL */ 285 286 #define CONFIG_SPL_OMAP3_ID_NAND 287 288 /* NAND: SPL falcon mode configs */ 289 #ifdef CONFIG_SPL_OS_BOOT 290 #define CONFIG_CMD_SPL_NAND_OFS 0x240000 291 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 292 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 293 #endif 294 295 #endif /* __CONFIG_H */ 296