1 /* 2 * Common configuration settings for IGEP technology based boards 3 * 4 * (C) Copyright 2012 5 * ISEE 2007 SL, <www.iseebcn.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __IGEP00X0_H 11 #define __IGEP00X0_H 12 13 #ifdef CONFIG_BOOT_NAND 14 #define CONFIG_NAND 15 #endif 16 17 #define CONFIG_NR_DRAM_BANKS 2 18 19 #include <configs/ti_omap3_common.h> 20 #include <asm/mach-types.h> 21 22 /* SRAM starts at 0x40200000 and ends at 0x4020FFFF (64KB) */ 23 #undef CONFIG_SPL_MAX_SIZE 24 #undef CONFIG_SPL_TEXT_BASE 25 26 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE) 27 #define CONFIG_SPL_TEXT_BASE 0x40200000 28 29 /* 30 * Display CPU and Board information 31 */ 32 #define CONFIG_DISPLAY_CPUINFO 1 33 #define CONFIG_DISPLAY_BOARDINFO 1 34 35 #define CONFIG_MISC_INIT_R 36 37 #define CONFIG_REVISION_TAG 1 38 39 /* Status LED available for IGEP0020 and IGEP0030 but not IGEP0032 */ 40 #if (CONFIG_MACH_TYPE != MACH_TYPE_IGEP0032) 41 #define CONFIG_STATUS_LED 42 #define CONFIG_BOARD_SPECIFIC_LED 43 #define CONFIG_GPIO_LED 44 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) 45 #define RED_LED_GPIO 27 46 #elif (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030) 47 #define RED_LED_GPIO 16 48 #else 49 #error "status LED not defined for this machine." 50 #endif 51 #define RED_LED_DEV 0 52 #define STATUS_LED_BIT RED_LED_GPIO 53 #define STATUS_LED_STATE STATUS_LED_ON 54 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 55 #define STATUS_LED_BOOT RED_LED_DEV 56 #endif 57 58 /* GPIO banks */ 59 #define CONFIG_OMAP3_GPIO_3 /* GPIO64 .. 95 is in GPIO bank 3 */ 60 #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */ 61 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */ 62 63 /* USB */ 64 #define CONFIG_USB_MUSB_UDC 1 65 #define CONFIG_USB_OMAP3 1 66 #define CONFIG_TWL4030_USB 1 67 68 /* USB device configuration */ 69 #define CONFIG_USB_DEVICE 1 70 #define CONFIG_USB_TTY 1 71 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 72 73 /* Change these to suit your needs */ 74 #define CONFIG_USBD_VENDORID 0x0451 75 #define CONFIG_USBD_PRODUCTID 0x5678 76 #define CONFIG_USBD_MANUFACTURER "Texas Instruments" 77 #define CONFIG_USBD_PRODUCT_NAME "IGEP" 78 79 #ifdef CONFIG_BOOT_ONENAND 80 #define CONFIG_CMD_ONENAND /* ONENAND support */ 81 #endif 82 83 #ifndef CONFIG_SPL_BUILD 84 85 /* Environment */ 86 #define ENV_DEVICE_SETTINGS \ 87 "stdin=serial\0" \ 88 "stdout=serial\0" \ 89 "stderr=serial\0" 90 91 #define MEM_LAYOUT_SETTINGS \ 92 DEFAULT_LINUX_BOOT_ENV \ 93 "scriptaddr=0x87E00000\0" \ 94 "pxefile_addr_r=0x87F00000\0" 95 96 #define BOOT_TARGET_DEVICES(func) \ 97 func(MMC, mmc, 0) 98 99 #include <config_distro_bootcmd.h> 100 101 #define CONFIG_EXTRA_ENV_SETTINGS \ 102 ENV_DEVICE_SETTINGS \ 103 MEM_LAYOUT_SETTINGS \ 104 BOOTENV 105 106 #endif 107 108 /* 109 * FLASH and environment organization 110 */ 111 112 #ifdef CONFIG_BOOT_ONENAND 113 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 114 115 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ 116 117 #define CONFIG_ENV_IS_IN_ONENAND 1 118 #define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ 119 #define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET 120 #endif 121 122 #ifdef CONFIG_NAND 123 #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ 124 #define CONFIG_ENV_IS_IN_NAND 1 125 #define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ 126 #define CONFIG_ENV_ADDR NAND_ENV_OFFSET 127 #endif 128 129 /* 130 * SMSC911x Ethernet 131 */ 132 #if defined(CONFIG_CMD_NET) 133 #define CONFIG_SMC911X 134 #define CONFIG_SMC911X_32_BIT 135 #define CONFIG_SMC911X_BASE 0x2C000000 136 #endif /* (CONFIG_CMD_NET) */ 137 138 /* OneNAND boot config */ 139 #ifdef CONFIG_BOOT_ONENAND 140 #define CONFIG_SPL_ONENAND_SUPPORT 141 #define CONFIG_SYS_ONENAND_U_BOOT_OFFS 0x80000 142 #define CONFIG_SYS_ONENAND_PAGE_SIZE 2048 143 #define CONFIG_SPL_ONENAND_LOAD_ADDR 0x80000 144 #define CONFIG_SPL_ONENAND_LOAD_SIZE \ 145 (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR) 146 147 #endif 148 149 /* NAND boot config */ 150 #ifdef CONFIG_NAND 151 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 152 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 153 #define CONFIG_SYS_NAND_PAGE_COUNT 64 154 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 155 #define CONFIG_SYS_NAND_OOBSIZE 64 156 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 157 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 158 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 159 10, 11, 12, 13, 14, 15, 16, 17, \ 160 18, 19, 20, 21, 22, 23, 24, 25, \ 161 26, 27, 28, 29, 30, 31, 32, 33, \ 162 34, 35, 36, 37, 38, 39, 40, 41, \ 163 42, 43, 44, 45, 46, 47, 48, 49, \ 164 50, 51, 52, 53, 54, 55, 56, 57, } 165 #define CONFIG_SYS_NAND_ECCSIZE 512 166 #define CONFIG_SYS_NAND_ECCBYTES 14 167 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW 168 #define CONFIG_NAND_OMAP_GPMC 169 #define CONFIG_BCH 170 171 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 172 /* NAND: SPL falcon mode configs */ 173 #ifdef CONFIG_SPL_OS_BOOT 174 #define CONFIG_CMD_SPL_NAND_OFS 0x240000 175 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 176 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 177 #endif 178 #endif 179 180 #endif /* __IGEP00X0_H */ 181