1 /*
2  * Common configuration settings for IGEP technology based boards
3  *
4  * (C) Copyright 2012
5  * ISEE 2007 SL, <www.iseebcn.com>
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __IGEP00X0_H
11 #define __IGEP00X0_H
12 
13 #ifdef CONFIG_BOOT_NAND
14 #define CONFIG_NAND
15 #endif
16 
17 #define CONFIG_NR_DRAM_BANKS            2
18 
19 #include <configs/ti_omap3_common.h>
20 #include <asm/mach-types.h>
21 
22 /*
23  * Display CPU and Board information
24  */
25 #define CONFIG_DISPLAY_CPUINFO		1
26 #define CONFIG_DISPLAY_BOARDINFO	1
27 
28 #define CONFIG_MISC_INIT_R
29 
30 #define CONFIG_REVISION_TAG		1
31 
32 /* Status LED available for IGEP0020 and IGEP0030 but not IGEP0032 */
33 #if (CONFIG_MACH_TYPE != MACH_TYPE_IGEP0032)
34 #define CONFIG_STATUS_LED
35 #define CONFIG_BOARD_SPECIFIC_LED
36 #define CONFIG_GPIO_LED
37 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020)
38 #define RED_LED_GPIO 27
39 #elif (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
40 #define RED_LED_GPIO 16
41 #else
42 #error "status LED not defined for this machine."
43 #endif
44 #define RED_LED_DEV			0
45 #define STATUS_LED_BIT			RED_LED_GPIO
46 #define STATUS_LED_STATE		STATUS_LED_ON
47 #define STATUS_LED_PERIOD		(CONFIG_SYS_HZ / 2)
48 #define STATUS_LED_BOOT			RED_LED_DEV
49 #endif
50 
51 /* GPIO banks */
52 #define CONFIG_OMAP3_GPIO_3		/* GPIO64 .. 95 is in GPIO bank 3 */
53 #define CONFIG_OMAP3_GPIO_5		/* GPIO128..159 is in GPIO bank 5 */
54 #define CONFIG_OMAP3_GPIO_6		/* GPIO160..191 is in GPIO bank 6 */
55 
56 /* USB */
57 #define CONFIG_USB_MUSB_UDC		1
58 #define CONFIG_USB_OMAP3		1
59 #define CONFIG_TWL4030_USB		1
60 
61 /* USB device configuration */
62 #define CONFIG_USB_DEVICE		1
63 #define CONFIG_USB_TTY			1
64 #define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
65 
66 /* Change these to suit your needs */
67 #define CONFIG_USBD_VENDORID		0x0451
68 #define CONFIG_USBD_PRODUCTID		0x5678
69 #define CONFIG_USBD_MANUFACTURER	"Texas Instruments"
70 #define CONFIG_USBD_PRODUCT_NAME	"IGEP"
71 
72 #define CONFIG_CMD_CACHE
73 #ifdef CONFIG_BOOT_ONENAND
74 #define CONFIG_CMD_ONENAND	/* ONENAND support		*/
75 #endif
76 #define CONFIG_CMD_DHCP
77 #define CONFIG_CMD_PING
78 
79 #ifndef CONFIG_SPL_BUILD
80 
81 /* Environment */
82 #define ENV_DEVICE_SETTINGS \
83 	"stdin=serial\0" \
84 	"stdout=serial\0" \
85 	"stderr=serial\0"
86 
87 #define MEM_LAYOUT_SETTINGS \
88 	DEFAULT_LINUX_BOOT_ENV \
89 	"scriptaddr=0x87E00000\0" \
90 	"pxefile_addr_r=0x87F00000\0"
91 
92 #define BOOT_TARGET_DEVICES(func) \
93 	func(MMC, mmc, 0)
94 
95 #include <config_distro_bootcmd.h>
96 
97 
98 #define CONFIG_EXTRA_ENV_SETTINGS \
99 	ENV_DEVICE_SETTINGS \
100 	MEM_LAYOUT_SETTINGS \
101 	BOOTENV
102 
103 #endif
104 
105 /*
106  * FLASH and environment organization
107  */
108 
109 #ifdef CONFIG_BOOT_ONENAND
110 #define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
111 
112 #define ONENAND_ENV_OFFSET		0x260000 /* environment starts here */
113 
114 #define CONFIG_ENV_IS_IN_ONENAND	1
115 #define CONFIG_ENV_SIZE			(512 << 10) /* Total Size Environment */
116 #define CONFIG_ENV_ADDR			ONENAND_ENV_OFFSET
117 #endif
118 
119 #ifdef CONFIG_NAND
120 #define CONFIG_ENV_OFFSET		0x260000 /* environment starts here */
121 #define CONFIG_ENV_IS_IN_NAND	        1
122 #define CONFIG_ENV_SIZE			(512 << 10) /* Total Size Environment */
123 #define CONFIG_ENV_ADDR			NAND_ENV_OFFSET
124 #endif
125 
126 /*
127  * SMSC911x Ethernet
128  */
129 #if defined(CONFIG_CMD_NET)
130 #define CONFIG_SMC911X
131 #define CONFIG_SMC911X_32_BIT
132 #define CONFIG_SMC911X_BASE		0x2C000000
133 #endif /* (CONFIG_CMD_NET) */
134 
135 /* OneNAND boot config */
136 #ifdef CONFIG_BOOT_ONENAND
137 #define CONFIG_SPL_ONENAND_SUPPORT
138 #define CONFIG_SYS_ONENAND_U_BOOT_OFFS  0x80000
139 #define CONFIG_SYS_ONENAND_PAGE_SIZE	2048
140 #define CONFIG_SPL_ONENAND_LOAD_ADDR    0x80000
141 #define CONFIG_SPL_ONENAND_LOAD_SIZE    \
142 	(512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
143 
144 #endif
145 
146 /* NAND boot config */
147 #ifdef CONFIG_NAND
148 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
149 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
150 #define CONFIG_SYS_NAND_PAGE_COUNT	64
151 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
152 #define CONFIG_SYS_NAND_OOBSIZE		64
153 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
154 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
155 #define CONFIG_SYS_NAND_ECCPOS		{ 2,  3,  4,  5,  6,  7,  8,  9, \
156 					 10, 11, 12, 13, 14, 15, 16, 17, \
157 					 18, 19, 20, 21, 22, 23, 24, 25, \
158 					 26, 27, 28, 29, 30, 31, 32, 33, \
159 					 34, 35, 36, 37, 38, 39, 40, 41, \
160 					 42, 43, 44, 45, 46, 47, 48, 49, \
161 					 50, 51, 52, 53, 54, 55, 56, 57, }
162 #define CONFIG_SYS_NAND_ECCSIZE		512
163 #define CONFIG_SYS_NAND_ECCBYTES	14
164 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
165 #define CONFIG_NAND_OMAP_GPMC
166 #define CONFIG_BCH
167 
168 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
169 /* NAND: SPL falcon mode configs */
170 #ifdef CONFIG_SPL_OS_BOOT
171 #define CONFIG_CMD_SPL_NAND_OFS		0x240000
172 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x280000
173 #define CONFIG_CMD_SPL_WRITE_SIZE	0x2000
174 #endif
175 #endif
176 
177 #endif /* __IGEP00X0_H */
178