1 /* 2 * Common configuration settings for IGEP technology based boards 3 * 4 * (C) Copyright 2012 5 * ISEE 2007 SL, <www.iseebcn.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __IGEP00X0_H 11 #define __IGEP00X0_H 12 13 #include <asm/sizes.h> 14 15 /* 16 * High Level Configuration Options 17 */ 18 #define CONFIG_OMAP 1 /* in a TI OMAP core */ 19 #define CONFIG_OMAP34XX 1 /* which is a 34XX */ 20 #define CONFIG_OMAP_GPIO 21 #define CONFIG_OMAP_COMMON 22 23 #define CONFIG_SDRC /* The chip has SDRC controller */ 24 25 #include <asm/arch/cpu.h> 26 #include <asm/arch/omap3.h> 27 #include <asm/mach-types.h> 28 29 /* 30 * Display CPU and Board information 31 */ 32 #define CONFIG_DISPLAY_CPUINFO 1 33 #define CONFIG_DISPLAY_BOARDINFO 1 34 35 /* Clock Defines */ 36 #define V_OSCK 26000000 /* Clock output from T2 */ 37 #define V_SCLK (V_OSCK >> 1) 38 39 #define CONFIG_MISC_INIT_R 40 41 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 42 #define CONFIG_SETUP_MEMORY_TAGS 1 43 #define CONFIG_INITRD_TAG 1 44 #define CONFIG_REVISION_TAG 1 45 46 #define CONFIG_OF_LIBFDT 47 #define CONFIG_CMD_BOOTZ 48 #define CONFIG_SUPPORT_RAW_INITRD 49 50 /* 51 * NS16550 Configuration 52 */ 53 54 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 55 56 #define CONFIG_SYS_NS16550 57 #define CONFIG_SYS_NS16550_SERIAL 58 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 59 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 60 61 /* select serial console configuration */ 62 #define CONFIG_CONS_INDEX 3 63 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 64 #define CONFIG_SERIAL3 3 65 66 /* allow to overwrite serial and ethaddr */ 67 #define CONFIG_ENV_OVERWRITE 68 #define CONFIG_BAUDRATE 115200 69 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ 70 115200} 71 #define CONFIG_GENERIC_MMC 1 72 #define CONFIG_MMC 1 73 #define CONFIG_OMAP_HSMMC 1 74 #define CONFIG_DOS_PARTITION 1 75 76 /* define to enable boot progress via leds */ 77 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \ 78 (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030) 79 #define CONFIG_SHOW_BOOT_PROGRESS 80 #endif 81 82 /* USB */ 83 #define CONFIG_MUSB_UDC 1 84 #define CONFIG_USB_OMAP3 1 85 #define CONFIG_TWL4030_USB 1 86 87 /* USB device configuration */ 88 #define CONFIG_USB_DEVICE 1 89 #define CONFIG_USB_TTY 1 90 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 91 92 /* Change these to suit your needs */ 93 #define CONFIG_USBD_VENDORID 0x0451 94 #define CONFIG_USBD_PRODUCTID 0x5678 95 #define CONFIG_USBD_MANUFACTURER "Texas Instruments" 96 #define CONFIG_USBD_PRODUCT_NAME "IGEP" 97 98 /* commands to include */ 99 #include <config_cmd_default.h> 100 101 #define CONFIG_CMD_CACHE 102 #define CONFIG_CMD_EXT4 103 #define CONFIG_CMD_FAT /* FAT support */ 104 #define CONFIG_CMD_FS_GENERIC 105 #define CONFIG_CMD_I2C /* I2C serial bus support */ 106 #define CONFIG_CMD_MMC /* MMC support */ 107 #ifdef CONFIG_BOOT_ONENAND 108 #define CONFIG_CMD_ONENAND /* ONENAND support */ 109 #endif 110 #ifdef CONFIG_BOOT_NAND 111 #define CONFIG_CMD_NAND 112 #endif 113 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \ 114 (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032) 115 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ 116 #endif 117 #define CONFIG_CMD_DHCP 118 #define CONFIG_CMD_PING 119 #define CONFIG_CMD_NFS /* NFS support */ 120 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 121 #define CONFIG_MTD_DEVICE 122 123 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 124 #undef CONFIG_CMD_IMLS /* List all found images */ 125 126 #define CONFIG_SYS_NO_FLASH 127 #define CONFIG_HARD_I2C 1 128 #define CONFIG_SYS_I2C_SPEED 100000 129 #define CONFIG_SYS_I2C_SLAVE 1 130 #define CONFIG_DRIVER_OMAP34XX_I2C 1 131 132 /* 133 * TWL4030 134 */ 135 #define CONFIG_TWL4030_POWER 1 136 137 #define CONFIG_BOOTDELAY 3 138 139 #define CONFIG_EXTRA_ENV_SETTINGS \ 140 "usbtty=cdc_acm\0" \ 141 "loadaddr=0x82000000\0" \ 142 "dtbaddr=0x81600000\0" \ 143 "bootdir=/boot\0" \ 144 "bootfile=zImage\0" \ 145 "usbtty=cdc_acm\0" \ 146 "console=ttyO2,115200n8\0" \ 147 "mpurate=auto\0" \ 148 "vram=12M\0" \ 149 "dvimode=1024x768MR-16@60\0" \ 150 "defaultdisplay=dvi\0" \ 151 "mmcdev=0\0" \ 152 "mmcroot=/dev/mmcblk0p2 rw\0" \ 153 "mmcrootfstype=ext4 rootwait\0" \ 154 "nandroot=/dev/mtdblock4 rw\0" \ 155 "nandrootfstype=jffs2\0" \ 156 "mmcargs=setenv bootargs console=${console} " \ 157 "mpurate=${mpurate} " \ 158 "vram=${vram} " \ 159 "omapfb.mode=dvi:${dvimode} " \ 160 "omapfb.debug=y " \ 161 "omapdss.def_disp=${defaultdisplay} " \ 162 "root=${mmcroot} " \ 163 "rootfstype=${mmcrootfstype}\0" \ 164 "nandargs=setenv bootargs console=${console} " \ 165 "mpurate=${mpurate} " \ 166 "vram=${vram} " \ 167 "omapfb.mode=dvi:${dvimode} " \ 168 "omapfb.debug=y " \ 169 "omapdss.def_disp=${defaultdisplay} " \ 170 "root=${nandroot} " \ 171 "rootfstype=${nandrootfstype}\0" \ 172 "loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ 173 "importbootenv=echo Importing environment from mmc ...; " \ 174 "env import -t $loadaddr $filesize\0" \ 175 "loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \ 176 "loadfdt=load mmc ${mmcdev}:2 ${dtbaddr} ${bootdir}/${dtbfile}\0" \ 177 "mmcboot=echo Booting from mmc ...; " \ 178 "run mmcargs; " \ 179 "bootz ${loadaddr}\0" \ 180 "mmcbootfdt=echo Booting with DT from mmc ...; " \ 181 "bootz ${loadaddr} - ${dtbaddr}\0" \ 182 "nandboot=echo Booting from onenand ...; " \ 183 "run nandargs; " \ 184 "onenand read ${loadaddr} 280000 400000; " \ 185 "bootz ${loadaddr}\0" \ 186 187 #define CONFIG_BOOTCOMMAND \ 188 "mmc dev ${mmcdev}; if mmc rescan; then " \ 189 "echo SD/MMC found on device ${mmcdev};" \ 190 "if run loadbootenv; then " \ 191 "run importbootenv;" \ 192 "fi;" \ 193 "if test -n $uenvcmd; then " \ 194 "echo Running uenvcmd ...;" \ 195 "run uenvcmd;" \ 196 "fi;" \ 197 "if run loadzimage; then " \ 198 "if test -n $dtbfile; then " \ 199 "if run loadfdt; then " \ 200 "run mmcbootfdt;" \ 201 "fi;" \ 202 "fi;" \ 203 "run mmcboot;" \ 204 "fi;" \ 205 "fi;" \ 206 "run nandboot;" \ 207 208 #define CONFIG_AUTO_COMPLETE 1 209 210 /* 211 * Miscellaneous configurable options 212 */ 213 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 214 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 215 #define CONFIG_SYS_PROMPT "U-Boot # " 216 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 217 /* Print Buffer Size */ 218 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 219 sizeof(CONFIG_SYS_PROMPT) + 16) 220 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 221 /* Boot Argument Buffer Size */ 222 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 223 224 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ 225 /* works on */ 226 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 227 0x01F00000) /* 31MB */ 228 229 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ 230 /* load address */ 231 232 #define CONFIG_SYS_MONITOR_LEN (256 << 10) 233 234 /* 235 * OMAP3 has 12 GP timers, they can be driven by the system clock 236 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 237 * This rate is divided by a local divisor. 238 */ 239 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 240 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 241 242 /* 243 * Physical Memory Map 244 * 245 */ 246 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 247 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 248 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 249 250 /* 251 * FLASH and environment organization 252 */ 253 254 #ifdef CONFIG_BOOT_ONENAND 255 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M /* Configure the PISMO */ 256 257 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 258 259 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ 260 261 #define CONFIG_ENV_IS_IN_ONENAND 1 262 #define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ 263 #define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET 264 #endif 265 266 #ifdef CONFIG_BOOT_NAND 267 #define PISMO1_NAND_SIZE GPMC_SIZE_128M /* Configure the PISMO */ 268 #define CONFIG_NAND_OMAP_GPMC 269 #define CONFIG_SYS_NAND_BASE NAND_BASE 270 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 271 #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ 272 #define CONFIG_ENV_IS_IN_NAND 1 273 #define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ 274 #define CONFIG_ENV_ADDR NAND_ENV_OFFSET 275 #define CONFIG_SYS_MAX_NAND_DEVICE 1 276 #endif 277 278 /* 279 * Size of malloc() pool 280 */ 281 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 282 283 /* 284 * SMSC911x Ethernet 285 */ 286 #if defined(CONFIG_CMD_NET) 287 #define CONFIG_SMC911X 288 #define CONFIG_SMC911X_32_BIT 289 #define CONFIG_SMC911X_BASE 0x2C000000 290 #endif /* (CONFIG_CMD_NET) */ 291 292 /* 293 * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader 294 * and older u-boot.bin with the new U-Boot SPL. 295 */ 296 #define CONFIG_SYS_TEXT_BASE 0x80008000 297 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 298 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 299 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 300 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 301 CONFIG_SYS_INIT_RAM_SIZE - \ 302 GENERATED_GBL_DATA_SIZE) 303 304 /* SPL */ 305 #define CONFIG_SPL 306 #define CONFIG_SPL_FRAMEWORK 307 #define CONFIG_SPL_NAND_SIMPLE 308 #define CONFIG_SPL_TEXT_BASE 0x40200800 309 #define CONFIG_SPL_MAX_SIZE (54 * 1024) 310 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 311 312 /* move malloc and bss high to prevent clashing with the main image */ 313 #define CONFIG_SYS_SPL_MALLOC_START 0x87000000 314 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 315 #define CONFIG_SPL_BSS_START_ADDR 0x87080000 /* end of minimum RAM */ 316 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 317 318 /* MMC boot config */ 319 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 320 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 321 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 322 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 323 324 #define CONFIG_SPL_BOARD_INIT 325 #define CONFIG_SPL_LIBCOMMON_SUPPORT 326 #define CONFIG_SPL_LIBDISK_SUPPORT 327 #define CONFIG_SPL_I2C_SUPPORT 328 #define CONFIG_SPL_LIBGENERIC_SUPPORT 329 #define CONFIG_SPL_MMC_SUPPORT 330 #define CONFIG_SPL_FAT_SUPPORT 331 #define CONFIG_SPL_SERIAL_SUPPORT 332 333 #define CONFIG_SPL_POWER_SUPPORT 334 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 335 336 #ifdef CONFIG_BOOT_ONENAND 337 #define CONFIG_SPL_ONENAND_SUPPORT 338 339 /* OneNAND boot config */ 340 #define CONFIG_SYS_ONENAND_U_BOOT_OFFS 0x80000 341 #define CONFIG_SYS_ONENAND_PAGE_SIZE 2048 342 #define CONFIG_SPL_ONENAND_LOAD_ADDR 0x80000 343 #define CONFIG_SPL_ONENAND_LOAD_SIZE \ 344 (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR) 345 346 #endif 347 348 #ifdef CONFIG_BOOT_NAND 349 #define CONFIG_SPL_NAND_SUPPORT 350 #define CONFIG_SPL_NAND_BASE 351 #define CONFIG_SPL_NAND_DRIVERS 352 #define CONFIG_SPL_NAND_ECC 353 354 /* NAND boot config */ 355 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 356 #define CONFIG_SYS_NAND_PAGE_COUNT 64 357 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 358 #define CONFIG_SYS_NAND_OOBSIZE 64 359 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 360 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 361 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 362 10, 11, 12, 13} 363 #define CONFIG_SYS_NAND_ECCSIZE 512 364 #define CONFIG_SYS_NAND_ECCBYTES 3 365 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 366 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 367 #endif 368 369 #endif /* __IGEP00X0_H */ 370