1 /* 2 * Common configuration settings for IGEP technology based boards 3 * 4 * (C) Copyright 2012 5 * ISEE 2007 SL, <www.iseebcn.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __IGEP00X0_H 11 #define __IGEP00X0_H 12 13 #ifdef CONFIG_BOOT_NAND 14 #define CONFIG_NAND 15 #endif 16 17 #define CONFIG_NR_DRAM_BANKS 2 18 19 #include <configs/ti_omap3_common.h> 20 #include <asm/mach-types.h> 21 22 #undef CONFIG_BOOTDELAY 23 24 /* 25 * Display CPU and Board information 26 */ 27 #define CONFIG_DISPLAY_CPUINFO 1 28 #define CONFIG_DISPLAY_BOARDINFO 1 29 30 #define CONFIG_MISC_INIT_R 31 32 #define CONFIG_REVISION_TAG 1 33 34 /* Status LED available for IGEP0020 and IGEP0030 but not IGEP0032 */ 35 #if (CONFIG_MACH_TYPE != MACH_TYPE_IGEP0032) 36 #define CONFIG_STATUS_LED 37 #define CONFIG_BOARD_SPECIFIC_LED 38 #define CONFIG_GPIO_LED 39 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) 40 #define RED_LED_GPIO 27 41 #elif (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030) 42 #define RED_LED_GPIO 16 43 #else 44 #error "status LED not defined for this machine." 45 #endif 46 #define RED_LED_DEV 0 47 #define STATUS_LED_BIT RED_LED_GPIO 48 #define STATUS_LED_STATE STATUS_LED_ON 49 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 50 #define STATUS_LED_BOOT RED_LED_DEV 51 #endif 52 53 /* GPIO banks */ 54 #define CONFIG_OMAP3_GPIO_3 /* GPIO64 .. 95 is in GPIO bank 3 */ 55 #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */ 56 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */ 57 58 /* USB */ 59 #define CONFIG_USB_MUSB_UDC 1 60 #define CONFIG_USB_OMAP3 1 61 #define CONFIG_TWL4030_USB 1 62 63 /* USB device configuration */ 64 #define CONFIG_USB_DEVICE 1 65 #define CONFIG_USB_TTY 1 66 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 67 68 /* Change these to suit your needs */ 69 #define CONFIG_USBD_VENDORID 0x0451 70 #define CONFIG_USBD_PRODUCTID 0x5678 71 #define CONFIG_USBD_MANUFACTURER "Texas Instruments" 72 #define CONFIG_USBD_PRODUCT_NAME "IGEP" 73 74 #define CONFIG_CMD_CACHE 75 #ifdef CONFIG_BOOT_ONENAND 76 #define CONFIG_CMD_ONENAND /* ONENAND support */ 77 #endif 78 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \ 79 (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032) 80 #endif 81 #define CONFIG_CMD_DHCP 82 #define CONFIG_CMD_PING 83 84 /*#undef CONFIG_ENV_IS_NOWHERE*/ 85 86 #ifndef CONFIG_SPL_BUILD 87 88 #include <config_distro_defaults.h> 89 90 /* Environment */ 91 #define ENV_DEVICE_SETTINGS \ 92 "stdin=serial\0" \ 93 "stdout=serial\0" \ 94 "stderr=serial\0" 95 96 #define MEM_LAYOUT_SETTINGS \ 97 DEFAULT_LINUX_BOOT_ENV \ 98 "scriptaddr=0x87E00000\0" \ 99 "pxefile_addr_r=0x87F00000\0" 100 101 #define BOOT_TARGET_DEVICES(func) \ 102 func(MMC, mmc, 0) 103 104 #include <config_distro_bootcmd.h> 105 106 107 #define CONFIG_EXTRA_ENV_SETTINGS \ 108 ENV_DEVICE_SETTINGS \ 109 MEM_LAYOUT_SETTINGS \ 110 BOOTENV 111 112 #endif 113 114 /* 115 * FLASH and environment organization 116 */ 117 118 #ifdef CONFIG_BOOT_ONENAND 119 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 120 121 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ 122 123 #define CONFIG_ENV_IS_IN_ONENAND 1 124 #define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ 125 #define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET 126 #endif 127 128 #ifdef CONFIG_NAND 129 #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ 130 #define CONFIG_ENV_IS_IN_NAND 1 131 #define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ 132 #define CONFIG_ENV_ADDR NAND_ENV_OFFSET 133 #endif 134 135 /* 136 * SMSC911x Ethernet 137 */ 138 #if defined(CONFIG_CMD_NET) 139 #define CONFIG_SMC911X 140 #define CONFIG_SMC911X_32_BIT 141 #define CONFIG_SMC911X_BASE 0x2C000000 142 #endif /* (CONFIG_CMD_NET) */ 143 144 /* OneNAND boot config */ 145 #ifdef CONFIG_BOOT_ONENAND 146 #define CONFIG_SPL_ONENAND_SUPPORT 147 #define CONFIG_SYS_ONENAND_U_BOOT_OFFS 0x80000 148 #define CONFIG_SYS_ONENAND_PAGE_SIZE 2048 149 #define CONFIG_SPL_ONENAND_LOAD_ADDR 0x80000 150 #define CONFIG_SPL_ONENAND_LOAD_SIZE \ 151 (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR) 152 153 #endif 154 155 /* NAND boot config */ 156 #ifdef CONFIG_NAND 157 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 158 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 159 #define CONFIG_SYS_NAND_PAGE_COUNT 64 160 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 161 #define CONFIG_SYS_NAND_OOBSIZE 64 162 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 163 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 164 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 165 10, 11, 12, 13, 14, 15, 16, 17, \ 166 18, 19, 20, 21, 22, 23, 24, 25, \ 167 26, 27, 28, 29, 30, 31, 32, 33, \ 168 34, 35, 36, 37, 38, 39, 40, 41, \ 169 42, 43, 44, 45, 46, 47, 48, 49, \ 170 50, 51, 52, 53, 54, 55, 56, 57, } 171 #define CONFIG_SYS_NAND_ECCSIZE 512 172 #define CONFIG_SYS_NAND_ECCBYTES 14 173 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW 174 #define CONFIG_NAND_OMAP_GPMC 175 #define CONFIG_BCH 176 177 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 178 /* NAND: SPL falcon mode configs */ 179 #ifdef CONFIG_SPL_OS_BOOT 180 #define CONFIG_CMD_SPL_NAND_OFS 0x240000 181 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 182 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 183 #endif 184 #endif 185 186 #endif /* __IGEP00X0_H */ 187