1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Common configuration settings for IGEP technology based boards 4 * 5 * (C) Copyright 2012 6 * ISEE 2007 SL, <www.iseebcn.com> 7 */ 8 9 #ifndef __IGEP00X0_H 10 #define __IGEP00X0_H 11 12 #include <configs/ti_omap3_common.h> 13 14 /* 15 * We are only ever GP parts and will utilize all of the "downloaded image" 16 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB). 17 */ 18 #undef CONFIG_SPL_TEXT_BASE 19 #define CONFIG_SPL_TEXT_BASE 0x40200000 20 21 #define CONFIG_REVISION_TAG 1 22 23 /* TPS65950 */ 24 #define PBIASLITEVMODE1 (1 << 8) 25 26 /* LED */ 27 #define IGEP0020_GPIO_LED 27 28 #define IGEP0030_GPIO_LED 16 29 30 /* Board and revision detection GPIOs */ 31 #define IGEP0030_USB_TRANSCEIVER_RESET 54 32 #define GPIO_IGEP00X0_BOARD_DETECTION 28 33 #define GPIO_IGEP00X0_REVISION_DETECTION 129 34 35 #ifndef CONFIG_SPL_BUILD 36 37 /* Environment */ 38 #define ENV_DEVICE_SETTINGS \ 39 "stdin=serial\0" \ 40 "stdout=serial\0" \ 41 "stderr=serial\0" 42 43 #define MEM_LAYOUT_SETTINGS \ 44 DEFAULT_LINUX_BOOT_ENV \ 45 "scriptaddr=0x87E00000\0" \ 46 "pxefile_addr_r=0x87F00000\0" 47 48 #define BOOT_TARGET_DEVICES(func) \ 49 func(MMC, mmc, 0) 50 51 #include <config_distro_bootcmd.h> 52 53 #define ENV_FINDFDT \ 54 "findfdt="\ 55 "if test ${board_name} = igep0020; then " \ 56 "if test ${board_rev} = F; then " \ 57 "setenv fdtfile omap3-igep0020-rev-f.dtb; " \ 58 "else " \ 59 "setenv fdtfile omap3-igep0020.dtb; fi; fi; " \ 60 "if test ${board_name} = igep0030; then " \ 61 "if test ${board_rev} = G; then " \ 62 "setenv fdtfile omap3-igep0030-rev-g.dtb; " \ 63 "else " \ 64 "setenv fdtfile omap3-igep0030.dtb; fi; fi; " \ 65 "if test ${fdtfile} = ''; then " \ 66 "echo WARNING: Could not determine device tree to use; fi; \0" 67 68 #define CONFIG_EXTRA_ENV_SETTINGS \ 69 ENV_FINDFDT \ 70 ENV_DEVICE_SETTINGS \ 71 MEM_LAYOUT_SETTINGS \ 72 BOOTENV 73 74 #endif 75 76 #define CONFIG_SYS_MTDPARTS_RUNTIME 77 78 /* OneNAND config */ 79 #define CONFIG_USE_ONENAND_BOARD_INIT 80 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 81 #define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024) 82 83 /* NAND config */ 84 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 85 #define CONFIG_SYS_NAND_PAGE_COUNT 64 86 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 87 #define CONFIG_SYS_NAND_OOBSIZE 64 88 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 89 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 90 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 91 10, 11, 12, 13, 14, 15, 16, 17, \ 92 18, 19, 20, 21, 22, 23, 24, 25, \ 93 26, 27, 28, 29, 30, 31, 32, 33, \ 94 34, 35, 36, 37, 38, 39, 40, 41, \ 95 42, 43, 44, 45, 46, 47, 48, 49, \ 96 50, 51, 52, 53, 54, 55, 56, 57, } 97 #define CONFIG_SYS_NAND_ECCSIZE 512 98 #define CONFIG_SYS_NAND_ECCBYTES 14 99 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW 100 101 /* UBI configuration */ 102 #define CONFIG_SPL_UBI 1 103 #define CONFIG_SPL_UBI_MAX_VOL_LEBS 256 104 #define CONFIG_SPL_UBI_MAX_PEB_SIZE (256*1024) 105 #define CONFIG_SPL_UBI_MAX_PEBS 4096 106 #define CONFIG_SPL_UBI_VOL_IDS 8 107 #define CONFIG_SPL_UBI_LOAD_MONITOR_ID 0 108 #define CONFIG_SPL_UBI_LOAD_KERNEL_ID 3 109 #define CONFIG_SPL_UBI_LOAD_ARGS_ID 4 110 #define CONFIG_SPL_UBI_PEB_OFFSET 4 111 #define CONFIG_SPL_UBI_VID_OFFSET 512 112 #define CONFIG_SPL_UBI_LEB_START 2048 113 #define CONFIG_SPL_UBI_INFO_ADDR 0x88080000 114 115 /* environment organization */ 116 #define CONFIG_ENV_UBI_PART "UBI" 117 #define CONFIG_ENV_UBI_VOLUME "config" 118 #define CONFIG_ENV_UBI_VOLUME_REDUND "config_r" 119 #define CONFIG_ENV_SIZE (32*1024) 120 121 #endif /* __IGEP00X0_H */ 122