1 /* 2 * Configuration settings for the TI OMAP3 EVM board. 3 * 4 * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * Author : 7 * Manikandan Pillai <mani.pillai@ti.com> 8 * Derived from Beagle Board and 3430 SDP code by 9 * Richard Woodruff <r-woodruff2@ti.com> 10 * Syed Mohammed Khasim <khasim@ti.com> 11 * 12 * Manikandan Pillai <mani.pillai@ti.com> 13 * 14 * SPDX-License-Identifier: GPL-2.0+ 15 */ 16 17 #ifndef __OMAP3EVM_CONFIG_H 18 #define __OMAP3EVM_CONFIG_H 19 20 #include <asm/arch/cpu.h> 21 #include <asm/arch/omap.h> 22 23 /* ---------------------------------------------------------------------------- 24 * Supported U-Boot commands 25 * ---------------------------------------------------------------------------- 26 */ 27 28 #define CONFIG_CMD_JFFS2 29 30 #define CONFIG_CMD_NAND 31 32 /* ---------------------------------------------------------------------------- 33 * Supported U-Boot features 34 * ---------------------------------------------------------------------------- 35 */ 36 #define CONFIG_SYS_LONGHELP 37 38 /* Allow to overwrite serial and ethaddr */ 39 #define CONFIG_ENV_OVERWRITE 40 41 /* Add auto-completion support */ 42 #define CONFIG_AUTO_COMPLETE 43 44 /* ---------------------------------------------------------------------------- 45 * Supported hardware 46 * ---------------------------------------------------------------------------- 47 */ 48 49 /* SPL */ 50 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 51 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 52 53 /* Partition tables */ 54 55 /* USB 56 * 57 * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard 58 * Enable CONFIG_USB_MUSB_UDD for Device functionalities. 59 */ 60 #define CONFIG_USB_OMAP3 61 #define CONFIG_USB_MUSB_HCD 62 /* #define CONFIG_USB_MUSB_UDC */ 63 64 /* NAND SPL */ 65 #define CONFIG_SPL_NAND_SIMPLE 66 #define CONFIG_SPL_NAND_BASE 67 #define CONFIG_SPL_NAND_DRIVERS 68 #define CONFIG_SPL_NAND_ECC 69 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 70 #define CONFIG_SYS_NAND_PAGE_COUNT 64 71 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 72 #define CONFIG_SYS_NAND_OOBSIZE 64 73 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 74 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 75 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 76 10, 11, 12, 13} 77 #define CONFIG_SYS_NAND_ECCSIZE 512 78 #define CONFIG_SYS_NAND_ECCBYTES 3 79 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 80 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 81 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 82 83 /* 84 * High level configuration options 85 */ 86 #define CONFIG_OMAP /* This is TI OMAP core */ 87 #define CONFIG_OMAP_GPIO 88 89 #define CONFIG_SDRC /* The chip has SDRC controller */ 90 91 #define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */ 92 93 /* 94 * Clock related definitions 95 */ 96 #define V_OSCK 26000000 /* Clock output from T2 */ 97 #define V_SCLK (V_OSCK >> 1) 98 99 /* 100 * OMAP3 has 12 GP timers, they can be driven by the system clock 101 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 102 * This rate is divided by a local divisor. 103 */ 104 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 105 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 106 107 /* Size of environment - 128KB */ 108 #define CONFIG_ENV_SIZE (128 << 10) 109 110 /* Size of malloc pool */ 111 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 112 113 /* 114 * Physical Memory Map 115 * Note 1: CS1 may or may not be populated 116 * Note 2: SDRAM size is expected to be at least 32MB 117 */ 118 #define CONFIG_NR_DRAM_BANKS 2 119 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 120 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 121 122 /* Limits for memtest */ 123 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 124 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 125 0x01F00000) /* 31MB */ 126 127 /* Default load address */ 128 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) 129 130 /* ----------------------------------------------------------------------------- 131 * Hardware drivers 132 * ----------------------------------------------------------------------------- 133 */ 134 135 /* 136 * NS16550 Configuration 137 */ 138 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 139 140 #define CONFIG_SYS_NS16550_SERIAL 141 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 142 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 143 144 /* 145 * select serial console configuration 146 */ 147 #define CONFIG_CONS_INDEX 1 148 #define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */ 149 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 150 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 151 115200} 152 153 /* 154 * I2C 155 */ 156 #define CONFIG_SYS_I2C 157 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 158 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 159 #define CONFIG_SYS_I2C_OMAP34XX 160 161 /* 162 * PISMO support 163 */ 164 /* Monitor at start of flash - Reserve 2 sectors */ 165 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 166 167 #define CONFIG_SYS_MONITOR_LEN (256 << 10) 168 169 /* Start location & size of environment */ 170 #define ONENAND_ENV_OFFSET 0x260000 171 #define SMNAND_ENV_OFFSET 0x260000 172 173 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 174 175 /* 176 * NAND 177 */ 178 /* Physical address to access NAND */ 179 #define CONFIG_SYS_NAND_ADDR NAND_BASE 180 181 /* Physical address to access NAND at CS0 */ 182 #define CONFIG_SYS_NAND_BASE NAND_BASE 183 184 /* Max number of NAND devices */ 185 #define CONFIG_SYS_MAX_NAND_DEVICE 1 186 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 187 /* Timeout values (in ticks) */ 188 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) 189 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) 190 191 /* Flash banks JFFS2 should use */ 192 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ 193 CONFIG_SYS_MAX_NAND_DEVICE) 194 195 #define CONFIG_SYS_JFFS2_MEM_NAND 196 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS 197 #define CONFIG_SYS_JFFS2_NUM_BANKS 1 198 199 #define CONFIG_JFFS2_NAND 200 /* nand device jffs2 lives on */ 201 #define CONFIG_JFFS2_DEV "nand0" 202 /* Start of jffs2 partition */ 203 #define CONFIG_JFFS2_PART_OFFSET 0x680000 204 /* Size of jffs2 partition */ 205 #define CONFIG_JFFS2_PART_SIZE 0xf980000 206 207 /* 208 * USB 209 */ 210 #ifdef CONFIG_USB_OMAP3 211 212 #ifdef CONFIG_USB_MUSB_HCD 213 214 #ifdef CONFIG_USB_KEYBOARD 215 #define CONFIG_SYS_USB_EVENT_POLL 216 #define CONFIG_PREBOOT "usb start" 217 #endif /* CONFIG_USB_KEYBOARD */ 218 219 #endif /* CONFIG_USB_MUSB_HCD */ 220 221 #ifdef CONFIG_USB_MUSB_UDC 222 /* USB device configuration */ 223 #define CONFIG_USB_DEVICE 224 #define CONFIG_USB_TTY 225 226 /* Change these to suit your needs */ 227 #define CONFIG_USBD_VENDORID 0x0451 228 #define CONFIG_USBD_PRODUCTID 0x5678 229 #define CONFIG_USBD_MANUFACTURER "Texas Instruments" 230 #define CONFIG_USBD_PRODUCT_NAME "EVM" 231 #endif /* CONFIG_USB_MUSB_UDC */ 232 233 #endif /* CONFIG_USB_OMAP3 */ 234 235 /* ---------------------------------------------------------------------------- 236 * U-Boot features 237 * ---------------------------------------------------------------------------- 238 */ 239 #define CONFIG_SYS_MAXARGS 16 /* max args for a command */ 240 241 #define CONFIG_MISC_INIT_R 242 243 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 244 #define CONFIG_SETUP_MEMORY_TAGS 245 #define CONFIG_INITRD_TAG 246 #define CONFIG_REVISION_TAG 247 248 /* Size of Console IO buffer */ 249 #define CONFIG_SYS_CBSIZE 512 250 251 /* Size of print buffer */ 252 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 253 sizeof(CONFIG_SYS_PROMPT) + 16) 254 255 /* Size of bootarg buffer */ 256 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 257 258 #define CONFIG_BOOTFILE "uImage" 259 260 /* 261 * NAND / OneNAND 262 */ 263 #if defined(CONFIG_CMD_NAND) 264 #define CONFIG_SYS_FLASH_BASE NAND_BASE 265 266 #define CONFIG_NAND_OMAP_GPMC 267 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 268 #elif defined(CONFIG_CMD_ONENAND) 269 #define CONFIG_SYS_FLASH_BASE ONENAND_MAP 270 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 271 #endif 272 273 #if !defined(CONFIG_ENV_IS_NOWHERE) 274 #if defined(CONFIG_CMD_NAND) 275 #define CONFIG_ENV_IS_IN_NAND 276 #elif defined(CONFIG_CMD_ONENAND) 277 #define CONFIG_ENV_IS_IN_ONENAND 278 #define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET 279 #endif 280 #endif /* CONFIG_ENV_IS_NOWHERE */ 281 282 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET 283 284 #if defined(CONFIG_CMD_NET) 285 286 /* Ethernet (SMSC9115 from SMSC9118 family) */ 287 #define CONFIG_SMC911X 288 #define CONFIG_SMC911X_32_BIT 289 #define CONFIG_SMC911X_BASE 0x2C000000 290 291 /* BOOTP fields */ 292 #define CONFIG_BOOTP_SUBNETMASK 0x00000001 293 #define CONFIG_BOOTP_GATEWAY 0x00000002 294 #define CONFIG_BOOTP_HOSTNAME 0x00000004 295 #define CONFIG_BOOTP_BOOTPATH 0x00000010 296 297 #endif /* CONFIG_CMD_NET */ 298 299 /* Support for relocation */ 300 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 301 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 302 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 303 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 304 CONFIG_SYS_INIT_RAM_SIZE - \ 305 GENERATED_GBL_DATA_SIZE) 306 307 /* ----------------------------------------------------------------------------- 308 * Board specific 309 * ----------------------------------------------------------------------------- 310 */ 311 312 /* Uncomment to define the board revision statically */ 313 /* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */ 314 315 /* Defines for SPL */ 316 #define CONFIG_SPL_FRAMEWORK 317 #define CONFIG_SPL_TEXT_BASE 0x40200800 318 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 319 CONFIG_SPL_TEXT_BASE) 320 321 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 322 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 323 324 #define CONFIG_SPL_BOARD_INIT 325 #define CONFIG_SPL_OMAP3_ID_NAND 326 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" 327 328 /* 329 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 330 * 64 bytes before this address should be set aside for u-boot.img's 331 * header. That is 0x800FFFC0--0x80100000 should not be used for any 332 * other needs. 333 */ 334 #define CONFIG_SYS_TEXT_BASE 0x80100000 335 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 336 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 337 338 /* ----------------------------------------------------------------------------- 339 * Default environment 340 * ----------------------------------------------------------------------------- 341 */ 342 343 #define CONFIG_EXTRA_ENV_SETTINGS \ 344 "loadaddr=0x82000000\0" \ 345 "usbtty=cdc_acm\0" \ 346 "mmcdev=0\0" \ 347 "console=ttyO0,115200n8\0" \ 348 "mmcargs=setenv bootargs console=${console} " \ 349 "root=/dev/mmcblk0p2 rw " \ 350 "rootfstype=ext3 rootwait\0" \ 351 "nandargs=setenv bootargs console=${console} " \ 352 "root=/dev/mtdblock4 rw " \ 353 "rootfstype=jffs2\0" \ 354 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 355 "bootscript=echo Running bootscript from mmc ...; " \ 356 "source ${loadaddr}\0" \ 357 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 358 "mmcboot=echo Booting from mmc ...; " \ 359 "run mmcargs; " \ 360 "bootm ${loadaddr}\0" \ 361 "nandboot=echo Booting from nand ...; " \ 362 "run nandargs; " \ 363 "onenand read ${loadaddr} 280000 400000; " \ 364 "bootm ${loadaddr}\0" \ 365 366 #define CONFIG_BOOTCOMMAND \ 367 "mmc dev ${mmcdev}; if mmc rescan; then " \ 368 "if run loadbootscript; then " \ 369 "run bootscript; " \ 370 "else " \ 371 "if run loaduimage; then " \ 372 "run mmcboot; " \ 373 "else run nandboot; " \ 374 "fi; " \ 375 "fi; " \ 376 "else run nandboot; fi" 377 378 #endif /* __OMAP3EVM_CONFIG_H */ 379