xref: /openbmc/u-boot/include/configs/omap3_evm.h (revision df87e6b1)
1 /*
2  * Configuration settings for the TI OMAP3 EVM board.
3  *
4  * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
5  *
6  * Author :
7  *	Manikandan Pillai <mani.pillai@ti.com>
8  * Derived from Beagle Board and 3430 SDP code by
9  *	Richard Woodruff <r-woodruff2@ti.com>
10  *	Syed Mohammed Khasim <khasim@ti.com>
11  *
12  * Manikandan Pillai <mani.pillai@ti.com>
13  *
14  * SPDX-License-Identifier:	GPL-2.0+
15  */
16 
17 #ifndef __OMAP3EVM_CONFIG_H
18 #define __OMAP3EVM_CONFIG_H
19 
20 #include <asm/arch/cpu.h>
21 #include <asm/arch/omap.h>
22 
23 /* ----------------------------------------------------------------------------
24  * Supported U-Boot commands
25  * ----------------------------------------------------------------------------
26  */
27 
28 #define CONFIG_CMD_JFFS2
29 
30 #define CONFIG_CMD_NAND
31 
32 /* ----------------------------------------------------------------------------
33  * Supported U-Boot features
34  * ----------------------------------------------------------------------------
35  */
36 #define CONFIG_SYS_LONGHELP
37 
38 /* Allow to overwrite serial and ethaddr */
39 #define CONFIG_ENV_OVERWRITE
40 
41 /* Add auto-completion support */
42 #define CONFIG_AUTO_COMPLETE
43 
44 /* ----------------------------------------------------------------------------
45  * Supported hardware
46  * ----------------------------------------------------------------------------
47  */
48 
49 /* MMC */
50 #define CONFIG_MMC
51 #define CONFIG_GENERIC_MMC
52 #define CONFIG_OMAP_HSMMC
53 
54 /* SPL */
55 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
56 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
57 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
58 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"u-boot.img"
59 
60 /* Partition tables */
61 #define CONFIG_EFI_PARTITION
62 #define CONFIG_DOS_PARTITION
63 
64 /* USB
65  *
66  * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
67  * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
68  */
69 #define CONFIG_USB_OMAP3
70 #define CONFIG_USB_MUSB_HCD
71 /* #define CONFIG_USB_MUSB_UDC */
72 
73 /* NAND SPL */
74 #define CONFIG_SPL_NAND_SIMPLE
75 #define CONFIG_SPL_NAND_BASE
76 #define CONFIG_SPL_NAND_DRIVERS
77 #define CONFIG_SPL_NAND_ECC
78 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
79 #define CONFIG_SYS_NAND_PAGE_COUNT	64
80 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
81 #define CONFIG_SYS_NAND_OOBSIZE		64
82 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
83 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
84 #define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9,\
85 						10, 11, 12, 13}
86 #define CONFIG_SYS_NAND_ECCSIZE		512
87 #define CONFIG_SYS_NAND_ECCBYTES	3
88 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_HAM1_CODE_HW
89 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
90 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
91 
92 /*
93  * High level configuration options
94  */
95 #define CONFIG_OMAP			/* This is TI OMAP core */
96 #define CONFIG_OMAP_GPIO
97 #define CONFIG_OMAP_COMMON
98 /* Common ARM Erratas */
99 #define CONFIG_ARM_ERRATA_454179
100 #define CONFIG_ARM_ERRATA_430973
101 #define CONFIG_ARM_ERRATA_621766
102 
103 #define CONFIG_SDRC			/* The chip has SDRC controller */
104 
105 #define CONFIG_OMAP3_EVM		/* This is a OMAP3 EVM */
106 #define CONFIG_TWL4030_POWER		/* with TWL4030 PMIC */
107 
108 /*
109  * Clock related definitions
110  */
111 #define V_OSCK			26000000	/* Clock output from T2 */
112 #define V_SCLK			(V_OSCK >> 1)
113 
114 /*
115  * OMAP3 has 12 GP timers, they can be driven by the system clock
116  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
117  * This rate is divided by a local divisor.
118  */
119 #define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
120 #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
121 
122 /* Size of environment - 128KB */
123 #define CONFIG_ENV_SIZE			(128 << 10)
124 
125 /* Size of malloc pool */
126 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10))
127 
128 /*
129  * Physical Memory Map
130  * Note 1: CS1 may or may not be populated
131  * Note 2: SDRAM size is expected to be at least 32MB
132  */
133 #define CONFIG_NR_DRAM_BANKS		2
134 #define PHYS_SDRAM_1			OMAP34XX_SDRC_CS0
135 #define PHYS_SDRAM_2			OMAP34XX_SDRC_CS1
136 
137 /* Limits for memtest */
138 #define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
139 #define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
140 						0x01F00000) /* 31MB */
141 
142 /* Default load address */
143 #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0)
144 
145 /* -----------------------------------------------------------------------------
146  * Hardware drivers
147  * -----------------------------------------------------------------------------
148  */
149 
150 /*
151  * NS16550 Configuration
152  */
153 #define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */
154 
155 #define CONFIG_SYS_NS16550_SERIAL
156 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
157 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
158 
159 /*
160  * select serial console configuration
161  */
162 #define CONFIG_CONS_INDEX		1
163 #define CONFIG_SERIAL1			1	/* UART1 on OMAP3 EVM */
164 #define CONFIG_SYS_NS16550_COM1		OMAP34XX_UART1
165 #define CONFIG_BAUDRATE			115200
166 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
167 					115200}
168 
169 /*
170  * I2C
171  */
172 #define CONFIG_SYS_I2C
173 #define CONFIG_SYS_OMAP24_I2C_SPEED	100000
174 #define CONFIG_SYS_OMAP24_I2C_SLAVE	1
175 #define CONFIG_SYS_I2C_OMAP34XX
176 
177 /*
178  * PISMO support
179  */
180 /* Monitor at start of flash - Reserve 2 sectors */
181 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
182 
183 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)
184 
185 /* Start location & size of environment */
186 #define ONENAND_ENV_OFFSET		0x260000
187 #define SMNAND_ENV_OFFSET		0x260000
188 
189 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
190 
191 /*
192  * NAND
193  */
194 /* Physical address to access NAND */
195 #define CONFIG_SYS_NAND_ADDR		NAND_BASE
196 
197 /* Physical address to access NAND at CS0 */
198 #define CONFIG_SYS_NAND_BASE		NAND_BASE
199 
200 /* Max number of NAND devices */
201 #define CONFIG_SYS_MAX_NAND_DEVICE	1
202 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
203 /* Timeout values (in ticks) */
204 #define CONFIG_SYS_FLASH_ERASE_TOUT	(100 * CONFIG_SYS_HZ)
205 #define CONFIG_SYS_FLASH_WRITE_TOUT	(100 * CONFIG_SYS_HZ)
206 
207 /* Flash banks JFFS2 should use */
208 #define CONFIG_SYS_MAX_MTD_BANKS	(CONFIG_SYS_MAX_FLASH_BANKS + \
209 						CONFIG_SYS_MAX_NAND_DEVICE)
210 
211 #define CONFIG_SYS_JFFS2_MEM_NAND
212 #define CONFIG_SYS_JFFS2_FIRST_BANK	CONFIG_SYS_MAX_FLASH_BANKS
213 #define CONFIG_SYS_JFFS2_NUM_BANKS	1
214 
215 #define CONFIG_JFFS2_NAND
216 /* nand device jffs2 lives on */
217 #define CONFIG_JFFS2_DEV		"nand0"
218 /* Start of jffs2 partition */
219 #define CONFIG_JFFS2_PART_OFFSET	0x680000
220 /* Size of jffs2 partition */
221 #define CONFIG_JFFS2_PART_SIZE		0xf980000
222 
223 /*
224  * USB
225  */
226 #ifdef CONFIG_USB_OMAP3
227 
228 #ifdef CONFIG_USB_MUSB_HCD
229 
230 #define CONGIG_CMD_STORAGE
231 
232 #ifdef CONFIG_USB_KEYBOARD
233 #define CONFIG_SYS_USB_EVENT_POLL
234 #define CONFIG_PREBOOT			"usb start"
235 #endif /* CONFIG_USB_KEYBOARD */
236 
237 #endif /* CONFIG_USB_MUSB_HCD */
238 
239 #ifdef CONFIG_USB_MUSB_UDC
240 /* USB device configuration */
241 #define CONFIG_USB_DEVICE
242 #define CONFIG_USB_TTY
243 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
244 
245 /* Change these to suit your needs */
246 #define CONFIG_USBD_VENDORID		0x0451
247 #define CONFIG_USBD_PRODUCTID		0x5678
248 #define CONFIG_USBD_MANUFACTURER	"Texas Instruments"
249 #define CONFIG_USBD_PRODUCT_NAME	"EVM"
250 #endif /* CONFIG_USB_MUSB_UDC */
251 
252 #endif /* CONFIG_USB_OMAP3 */
253 
254 /* ----------------------------------------------------------------------------
255  * U-Boot features
256  * ----------------------------------------------------------------------------
257  */
258 #define CONFIG_SYS_MAXARGS		16	/* max args for a command */
259 
260 #define CONFIG_MISC_INIT_R
261 
262 #define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
263 #define CONFIG_SETUP_MEMORY_TAGS
264 #define CONFIG_INITRD_TAG
265 #define CONFIG_REVISION_TAG
266 
267 /* Size of Console IO buffer */
268 #define CONFIG_SYS_CBSIZE		512
269 
270 /* Size of print buffer */
271 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
272 						sizeof(CONFIG_SYS_PROMPT) + 16)
273 
274 /* Size of bootarg buffer */
275 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
276 
277 #define CONFIG_BOOTFILE			"uImage"
278 
279 /*
280  * NAND / OneNAND
281  */
282 #if defined(CONFIG_CMD_NAND)
283 #define CONFIG_SYS_FLASH_BASE		NAND_BASE
284 
285 #define CONFIG_NAND_OMAP_GPMC
286 #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
287 #elif defined(CONFIG_CMD_ONENAND)
288 #define CONFIG_SYS_FLASH_BASE		ONENAND_MAP
289 #define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
290 #endif
291 
292 #if !defined(CONFIG_ENV_IS_NOWHERE)
293 #if defined(CONFIG_CMD_NAND)
294 #define CONFIG_ENV_IS_IN_NAND
295 #elif defined(CONFIG_CMD_ONENAND)
296 #define CONFIG_ENV_IS_IN_ONENAND
297 #define CONFIG_ENV_OFFSET		ONENAND_ENV_OFFSET
298 #endif
299 #endif /* CONFIG_ENV_IS_NOWHERE */
300 
301 #define CONFIG_ENV_ADDR			CONFIG_ENV_OFFSET
302 
303 #if defined(CONFIG_CMD_NET)
304 
305 /* Ethernet (SMSC9115 from SMSC9118 family) */
306 #define CONFIG_SMC911X
307 #define CONFIG_SMC911X_32_BIT
308 #define CONFIG_SMC911X_BASE		0x2C000000
309 
310 /* BOOTP fields */
311 #define CONFIG_BOOTP_SUBNETMASK		0x00000001
312 #define CONFIG_BOOTP_GATEWAY		0x00000002
313 #define CONFIG_BOOTP_HOSTNAME		0x00000004
314 #define CONFIG_BOOTP_BOOTPATH		0x00000010
315 
316 #endif /* CONFIG_CMD_NET */
317 
318 /* Support for relocation */
319 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
320 #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
321 #define CONFIG_SYS_INIT_RAM_SIZE	0x800
322 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
323 					 CONFIG_SYS_INIT_RAM_SIZE - \
324 					 GENERATED_GBL_DATA_SIZE)
325 
326 /* -----------------------------------------------------------------------------
327  * Board specific
328  * -----------------------------------------------------------------------------
329  */
330 #define CONFIG_SYS_NO_FLASH
331 
332 /* Uncomment to define the board revision statically */
333 /* #define CONFIG_STATIC_BOARD_REV	OMAP3EVM_BOARD_GEN_2 */
334 
335 /* Defines for SPL */
336 #define CONFIG_SPL_FRAMEWORK
337 #define CONFIG_SPL_TEXT_BASE		0x40200800
338 #define CONFIG_SPL_MAX_SIZE		(SRAM_SCRATCH_SPACE_ADDR - \
339 					 CONFIG_SPL_TEXT_BASE)
340 
341 #define CONFIG_SPL_BSS_START_ADDR	0x80000000
342 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
343 
344 #define CONFIG_SPL_BOARD_INIT
345 #define CONFIG_SPL_OMAP3_ID_NAND
346 #define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
347 
348 /*
349  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
350  * 64 bytes before this address should be set aside for u-boot.img's
351  * header. That is 0x800FFFC0--0x80100000 should not be used for any
352  * other needs.
353  */
354 #define CONFIG_SYS_TEXT_BASE		0x80100000
355 #define CONFIG_SYS_SPL_MALLOC_START	0x80208000
356 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
357 
358 /* -----------------------------------------------------------------------------
359  * Default environment
360  * -----------------------------------------------------------------------------
361  */
362 
363 #define CONFIG_EXTRA_ENV_SETTINGS \
364 	"loadaddr=0x82000000\0" \
365 	"usbtty=cdc_acm\0" \
366 	"mmcdev=0\0" \
367 	"console=ttyO0,115200n8\0" \
368 	"mmcargs=setenv bootargs console=${console} " \
369 		"root=/dev/mmcblk0p2 rw " \
370 		"rootfstype=ext3 rootwait\0" \
371 	"nandargs=setenv bootargs console=${console} " \
372 		"root=/dev/mtdblock4 rw " \
373 		"rootfstype=jffs2\0" \
374 	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
375 	"bootscript=echo Running bootscript from mmc ...; " \
376 		"source ${loadaddr}\0" \
377 	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
378 	"mmcboot=echo Booting from mmc ...; " \
379 		"run mmcargs; " \
380 		"bootm ${loadaddr}\0" \
381 	"nandboot=echo Booting from nand ...; " \
382 		"run nandargs; " \
383 		"onenand read ${loadaddr} 280000 400000; " \
384 		"bootm ${loadaddr}\0" \
385 
386 #define CONFIG_BOOTCOMMAND \
387 	"mmc dev ${mmcdev}; if mmc rescan; then " \
388 		"if run loadbootscript; then " \
389 			"run bootscript; " \
390 		"else " \
391 			"if run loaduimage; then " \
392 				"run mmcboot; " \
393 			"else run nandboot; " \
394 			"fi; " \
395 		"fi; " \
396 	"else run nandboot; fi"
397 
398 #endif /* __OMAP3EVM_CONFIG_H */
399