1 /* 2 * Configuration settings for the TI OMAP3 EVM board. 3 * 4 * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * Author : 7 * Manikandan Pillai <mani.pillai@ti.com> 8 * Derived from Beagle Board and 3430 SDP code by 9 * Richard Woodruff <r-woodruff2@ti.com> 10 * Syed Mohammed Khasim <khasim@ti.com> 11 * 12 * Manikandan Pillai <mani.pillai@ti.com> 13 * 14 * SPDX-License-Identifier: GPL-2.0+ 15 */ 16 17 #ifndef __OMAP3EVM_CONFIG_H 18 #define __OMAP3EVM_CONFIG_H 19 20 #include <asm/arch/cpu.h> 21 #include <asm/arch/omap.h> 22 23 /* ---------------------------------------------------------------------------- 24 * Supported U-Boot commands 25 * ---------------------------------------------------------------------------- 26 */ 27 28 #define CONFIG_CMD_JFFS2 29 30 #define CONFIG_CMD_NAND 31 32 /* ---------------------------------------------------------------------------- 33 * Supported U-Boot features 34 * ---------------------------------------------------------------------------- 35 */ 36 #define CONFIG_SYS_LONGHELP 37 38 /* Allow to overwrite serial and ethaddr */ 39 #define CONFIG_ENV_OVERWRITE 40 41 /* Add auto-completion support */ 42 #define CONFIG_AUTO_COMPLETE 43 44 /* ---------------------------------------------------------------------------- 45 * Supported hardware 46 * ---------------------------------------------------------------------------- 47 */ 48 49 /* MMC */ 50 #define CONFIG_GENERIC_MMC 51 52 /* SPL */ 53 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 54 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 55 56 /* Partition tables */ 57 #define CONFIG_EFI_PARTITION 58 #define CONFIG_DOS_PARTITION 59 60 /* USB 61 * 62 * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard 63 * Enable CONFIG_USB_MUSB_UDD for Device functionalities. 64 */ 65 #define CONFIG_USB_OMAP3 66 #define CONFIG_USB_MUSB_HCD 67 /* #define CONFIG_USB_MUSB_UDC */ 68 69 /* NAND SPL */ 70 #define CONFIG_SPL_NAND_SIMPLE 71 #define CONFIG_SPL_NAND_BASE 72 #define CONFIG_SPL_NAND_DRIVERS 73 #define CONFIG_SPL_NAND_ECC 74 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 75 #define CONFIG_SYS_NAND_PAGE_COUNT 64 76 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 77 #define CONFIG_SYS_NAND_OOBSIZE 64 78 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 79 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 80 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 81 10, 11, 12, 13} 82 #define CONFIG_SYS_NAND_ECCSIZE 512 83 #define CONFIG_SYS_NAND_ECCBYTES 3 84 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 85 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 86 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 87 88 /* 89 * High level configuration options 90 */ 91 #define CONFIG_OMAP /* This is TI OMAP core */ 92 #define CONFIG_OMAP_GPIO 93 /* Common ARM Erratas */ 94 #define CONFIG_ARM_ERRATA_454179 95 #define CONFIG_ARM_ERRATA_430973 96 #define CONFIG_ARM_ERRATA_621766 97 98 #define CONFIG_SDRC /* The chip has SDRC controller */ 99 100 #define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */ 101 #define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */ 102 103 /* 104 * Clock related definitions 105 */ 106 #define V_OSCK 26000000 /* Clock output from T2 */ 107 #define V_SCLK (V_OSCK >> 1) 108 109 /* 110 * OMAP3 has 12 GP timers, they can be driven by the system clock 111 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 112 * This rate is divided by a local divisor. 113 */ 114 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 115 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 116 117 /* Size of environment - 128KB */ 118 #define CONFIG_ENV_SIZE (128 << 10) 119 120 /* Size of malloc pool */ 121 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 122 123 /* 124 * Physical Memory Map 125 * Note 1: CS1 may or may not be populated 126 * Note 2: SDRAM size is expected to be at least 32MB 127 */ 128 #define CONFIG_NR_DRAM_BANKS 2 129 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 130 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 131 132 /* Limits for memtest */ 133 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 134 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 135 0x01F00000) /* 31MB */ 136 137 /* Default load address */ 138 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) 139 140 /* ----------------------------------------------------------------------------- 141 * Hardware drivers 142 * ----------------------------------------------------------------------------- 143 */ 144 145 /* 146 * NS16550 Configuration 147 */ 148 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 149 150 #define CONFIG_SYS_NS16550_SERIAL 151 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 152 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 153 154 /* 155 * select serial console configuration 156 */ 157 #define CONFIG_CONS_INDEX 1 158 #define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */ 159 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 160 #define CONFIG_BAUDRATE 115200 161 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 162 115200} 163 164 /* 165 * I2C 166 */ 167 #define CONFIG_SYS_I2C 168 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 169 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 170 #define CONFIG_SYS_I2C_OMAP34XX 171 172 /* 173 * PISMO support 174 */ 175 /* Monitor at start of flash - Reserve 2 sectors */ 176 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 177 178 #define CONFIG_SYS_MONITOR_LEN (256 << 10) 179 180 /* Start location & size of environment */ 181 #define ONENAND_ENV_OFFSET 0x260000 182 #define SMNAND_ENV_OFFSET 0x260000 183 184 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 185 186 /* 187 * NAND 188 */ 189 /* Physical address to access NAND */ 190 #define CONFIG_SYS_NAND_ADDR NAND_BASE 191 192 /* Physical address to access NAND at CS0 */ 193 #define CONFIG_SYS_NAND_BASE NAND_BASE 194 195 /* Max number of NAND devices */ 196 #define CONFIG_SYS_MAX_NAND_DEVICE 1 197 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 198 /* Timeout values (in ticks) */ 199 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) 200 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) 201 202 /* Flash banks JFFS2 should use */ 203 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ 204 CONFIG_SYS_MAX_NAND_DEVICE) 205 206 #define CONFIG_SYS_JFFS2_MEM_NAND 207 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS 208 #define CONFIG_SYS_JFFS2_NUM_BANKS 1 209 210 #define CONFIG_JFFS2_NAND 211 /* nand device jffs2 lives on */ 212 #define CONFIG_JFFS2_DEV "nand0" 213 /* Start of jffs2 partition */ 214 #define CONFIG_JFFS2_PART_OFFSET 0x680000 215 /* Size of jffs2 partition */ 216 #define CONFIG_JFFS2_PART_SIZE 0xf980000 217 218 /* 219 * USB 220 */ 221 #ifdef CONFIG_USB_OMAP3 222 223 #ifdef CONFIG_USB_MUSB_HCD 224 225 #define CONGIG_CMD_STORAGE 226 227 #ifdef CONFIG_USB_KEYBOARD 228 #define CONFIG_SYS_USB_EVENT_POLL 229 #define CONFIG_PREBOOT "usb start" 230 #endif /* CONFIG_USB_KEYBOARD */ 231 232 #endif /* CONFIG_USB_MUSB_HCD */ 233 234 #ifdef CONFIG_USB_MUSB_UDC 235 /* USB device configuration */ 236 #define CONFIG_USB_DEVICE 237 #define CONFIG_USB_TTY 238 239 /* Change these to suit your needs */ 240 #define CONFIG_USBD_VENDORID 0x0451 241 #define CONFIG_USBD_PRODUCTID 0x5678 242 #define CONFIG_USBD_MANUFACTURER "Texas Instruments" 243 #define CONFIG_USBD_PRODUCT_NAME "EVM" 244 #endif /* CONFIG_USB_MUSB_UDC */ 245 246 #endif /* CONFIG_USB_OMAP3 */ 247 248 /* ---------------------------------------------------------------------------- 249 * U-Boot features 250 * ---------------------------------------------------------------------------- 251 */ 252 #define CONFIG_SYS_MAXARGS 16 /* max args for a command */ 253 254 #define CONFIG_MISC_INIT_R 255 256 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 257 #define CONFIG_SETUP_MEMORY_TAGS 258 #define CONFIG_INITRD_TAG 259 #define CONFIG_REVISION_TAG 260 261 /* Size of Console IO buffer */ 262 #define CONFIG_SYS_CBSIZE 512 263 264 /* Size of print buffer */ 265 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 266 sizeof(CONFIG_SYS_PROMPT) + 16) 267 268 /* Size of bootarg buffer */ 269 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 270 271 #define CONFIG_BOOTFILE "uImage" 272 273 /* 274 * NAND / OneNAND 275 */ 276 #if defined(CONFIG_CMD_NAND) 277 #define CONFIG_SYS_FLASH_BASE NAND_BASE 278 279 #define CONFIG_NAND_OMAP_GPMC 280 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 281 #elif defined(CONFIG_CMD_ONENAND) 282 #define CONFIG_SYS_FLASH_BASE ONENAND_MAP 283 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 284 #endif 285 286 #if !defined(CONFIG_ENV_IS_NOWHERE) 287 #if defined(CONFIG_CMD_NAND) 288 #define CONFIG_ENV_IS_IN_NAND 289 #elif defined(CONFIG_CMD_ONENAND) 290 #define CONFIG_ENV_IS_IN_ONENAND 291 #define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET 292 #endif 293 #endif /* CONFIG_ENV_IS_NOWHERE */ 294 295 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET 296 297 #if defined(CONFIG_CMD_NET) 298 299 /* Ethernet (SMSC9115 from SMSC9118 family) */ 300 #define CONFIG_SMC911X 301 #define CONFIG_SMC911X_32_BIT 302 #define CONFIG_SMC911X_BASE 0x2C000000 303 304 /* BOOTP fields */ 305 #define CONFIG_BOOTP_SUBNETMASK 0x00000001 306 #define CONFIG_BOOTP_GATEWAY 0x00000002 307 #define CONFIG_BOOTP_HOSTNAME 0x00000004 308 #define CONFIG_BOOTP_BOOTPATH 0x00000010 309 310 #endif /* CONFIG_CMD_NET */ 311 312 /* Support for relocation */ 313 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 314 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 315 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 316 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 317 CONFIG_SYS_INIT_RAM_SIZE - \ 318 GENERATED_GBL_DATA_SIZE) 319 320 /* ----------------------------------------------------------------------------- 321 * Board specific 322 * ----------------------------------------------------------------------------- 323 */ 324 #define CONFIG_SYS_NO_FLASH 325 326 /* Uncomment to define the board revision statically */ 327 /* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */ 328 329 /* Defines for SPL */ 330 #define CONFIG_SPL_FRAMEWORK 331 #define CONFIG_SPL_TEXT_BASE 0x40200800 332 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 333 CONFIG_SPL_TEXT_BASE) 334 335 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 336 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 337 338 #define CONFIG_SPL_BOARD_INIT 339 #define CONFIG_SPL_OMAP3_ID_NAND 340 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" 341 342 /* 343 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 344 * 64 bytes before this address should be set aside for u-boot.img's 345 * header. That is 0x800FFFC0--0x80100000 should not be used for any 346 * other needs. 347 */ 348 #define CONFIG_SYS_TEXT_BASE 0x80100000 349 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 350 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 351 352 /* ----------------------------------------------------------------------------- 353 * Default environment 354 * ----------------------------------------------------------------------------- 355 */ 356 357 #define CONFIG_EXTRA_ENV_SETTINGS \ 358 "loadaddr=0x82000000\0" \ 359 "usbtty=cdc_acm\0" \ 360 "mmcdev=0\0" \ 361 "console=ttyO0,115200n8\0" \ 362 "mmcargs=setenv bootargs console=${console} " \ 363 "root=/dev/mmcblk0p2 rw " \ 364 "rootfstype=ext3 rootwait\0" \ 365 "nandargs=setenv bootargs console=${console} " \ 366 "root=/dev/mtdblock4 rw " \ 367 "rootfstype=jffs2\0" \ 368 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 369 "bootscript=echo Running bootscript from mmc ...; " \ 370 "source ${loadaddr}\0" \ 371 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 372 "mmcboot=echo Booting from mmc ...; " \ 373 "run mmcargs; " \ 374 "bootm ${loadaddr}\0" \ 375 "nandboot=echo Booting from nand ...; " \ 376 "run nandargs; " \ 377 "onenand read ${loadaddr} 280000 400000; " \ 378 "bootm ${loadaddr}\0" \ 379 380 #define CONFIG_BOOTCOMMAND \ 381 "mmc dev ${mmcdev}; if mmc rescan; then " \ 382 "if run loadbootscript; then " \ 383 "run bootscript; " \ 384 "else " \ 385 "if run loaduimage; then " \ 386 "run mmcboot; " \ 387 "else run nandboot; " \ 388 "fi; " \ 389 "fi; " \ 390 "else run nandboot; fi" 391 392 #endif /* __OMAP3EVM_CONFIG_H */ 393