1 /* 2 * Configuration settings for the TI OMAP3 EVM board. 3 * 4 * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * Author : 7 * Manikandan Pillai <mani.pillai@ti.com> 8 * Derived from Beagle Board and 3430 SDP code by 9 * Richard Woodruff <r-woodruff2@ti.com> 10 * Syed Mohammed Khasim <khasim@ti.com> 11 * 12 * Manikandan Pillai <mani.pillai@ti.com> 13 * 14 * SPDX-License-Identifier: GPL-2.0+ 15 */ 16 17 #ifndef __OMAP3EVM_CONFIG_H 18 #define __OMAP3EVM_CONFIG_H 19 20 #include <asm/arch/cpu.h> 21 #include <asm/arch/omap.h> 22 23 /* ---------------------------------------------------------------------------- 24 * Supported U-Boot commands 25 * ---------------------------------------------------------------------------- 26 */ 27 28 #define CONFIG_CMD_JFFS2 29 30 #define CONFIG_CMD_NAND 31 32 /* ---------------------------------------------------------------------------- 33 * Supported U-Boot features 34 * ---------------------------------------------------------------------------- 35 */ 36 #define CONFIG_SYS_LONGHELP 37 38 /* Allow to overwrite serial and ethaddr */ 39 #define CONFIG_ENV_OVERWRITE 40 41 /* Add auto-completion support */ 42 #define CONFIG_AUTO_COMPLETE 43 44 /* ---------------------------------------------------------------------------- 45 * Supported hardware 46 * ---------------------------------------------------------------------------- 47 */ 48 49 /* MMC */ 50 #define CONFIG_GENERIC_MMC 51 52 /* SPL */ 53 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 54 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 55 56 /* Partition tables */ 57 58 /* USB 59 * 60 * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard 61 * Enable CONFIG_USB_MUSB_UDD for Device functionalities. 62 */ 63 #define CONFIG_USB_OMAP3 64 #define CONFIG_USB_MUSB_HCD 65 /* #define CONFIG_USB_MUSB_UDC */ 66 67 /* NAND SPL */ 68 #define CONFIG_SPL_NAND_SIMPLE 69 #define CONFIG_SPL_NAND_BASE 70 #define CONFIG_SPL_NAND_DRIVERS 71 #define CONFIG_SPL_NAND_ECC 72 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 73 #define CONFIG_SYS_NAND_PAGE_COUNT 64 74 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 75 #define CONFIG_SYS_NAND_OOBSIZE 64 76 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 77 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 78 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 79 10, 11, 12, 13} 80 #define CONFIG_SYS_NAND_ECCSIZE 512 81 #define CONFIG_SYS_NAND_ECCBYTES 3 82 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 83 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 84 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 85 86 /* 87 * High level configuration options 88 */ 89 #define CONFIG_OMAP /* This is TI OMAP core */ 90 #define CONFIG_OMAP_GPIO 91 /* Common ARM Erratas */ 92 #define CONFIG_ARM_ERRATA_454179 93 #define CONFIG_ARM_ERRATA_430973 94 #define CONFIG_ARM_ERRATA_621766 95 96 #define CONFIG_SDRC /* The chip has SDRC controller */ 97 98 #define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */ 99 #define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */ 100 101 /* 102 * Clock related definitions 103 */ 104 #define V_OSCK 26000000 /* Clock output from T2 */ 105 #define V_SCLK (V_OSCK >> 1) 106 107 /* 108 * OMAP3 has 12 GP timers, they can be driven by the system clock 109 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 110 * This rate is divided by a local divisor. 111 */ 112 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 113 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 114 115 /* Size of environment - 128KB */ 116 #define CONFIG_ENV_SIZE (128 << 10) 117 118 /* Size of malloc pool */ 119 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 120 121 /* 122 * Physical Memory Map 123 * Note 1: CS1 may or may not be populated 124 * Note 2: SDRAM size is expected to be at least 32MB 125 */ 126 #define CONFIG_NR_DRAM_BANKS 2 127 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 128 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 129 130 /* Limits for memtest */ 131 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 132 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 133 0x01F00000) /* 31MB */ 134 135 /* Default load address */ 136 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) 137 138 /* ----------------------------------------------------------------------------- 139 * Hardware drivers 140 * ----------------------------------------------------------------------------- 141 */ 142 143 /* 144 * NS16550 Configuration 145 */ 146 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 147 148 #define CONFIG_SYS_NS16550_SERIAL 149 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 150 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 151 152 /* 153 * select serial console configuration 154 */ 155 #define CONFIG_CONS_INDEX 1 156 #define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */ 157 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 158 #define CONFIG_BAUDRATE 115200 159 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 160 115200} 161 162 /* 163 * I2C 164 */ 165 #define CONFIG_SYS_I2C 166 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 167 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 168 #define CONFIG_SYS_I2C_OMAP34XX 169 170 /* 171 * PISMO support 172 */ 173 /* Monitor at start of flash - Reserve 2 sectors */ 174 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 175 176 #define CONFIG_SYS_MONITOR_LEN (256 << 10) 177 178 /* Start location & size of environment */ 179 #define ONENAND_ENV_OFFSET 0x260000 180 #define SMNAND_ENV_OFFSET 0x260000 181 182 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 183 184 /* 185 * NAND 186 */ 187 /* Physical address to access NAND */ 188 #define CONFIG_SYS_NAND_ADDR NAND_BASE 189 190 /* Physical address to access NAND at CS0 */ 191 #define CONFIG_SYS_NAND_BASE NAND_BASE 192 193 /* Max number of NAND devices */ 194 #define CONFIG_SYS_MAX_NAND_DEVICE 1 195 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 196 /* Timeout values (in ticks) */ 197 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) 198 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) 199 200 /* Flash banks JFFS2 should use */ 201 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ 202 CONFIG_SYS_MAX_NAND_DEVICE) 203 204 #define CONFIG_SYS_JFFS2_MEM_NAND 205 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS 206 #define CONFIG_SYS_JFFS2_NUM_BANKS 1 207 208 #define CONFIG_JFFS2_NAND 209 /* nand device jffs2 lives on */ 210 #define CONFIG_JFFS2_DEV "nand0" 211 /* Start of jffs2 partition */ 212 #define CONFIG_JFFS2_PART_OFFSET 0x680000 213 /* Size of jffs2 partition */ 214 #define CONFIG_JFFS2_PART_SIZE 0xf980000 215 216 /* 217 * USB 218 */ 219 #ifdef CONFIG_USB_OMAP3 220 221 #ifdef CONFIG_USB_MUSB_HCD 222 223 #define CONGIG_CMD_STORAGE 224 225 #ifdef CONFIG_USB_KEYBOARD 226 #define CONFIG_SYS_USB_EVENT_POLL 227 #define CONFIG_PREBOOT "usb start" 228 #endif /* CONFIG_USB_KEYBOARD */ 229 230 #endif /* CONFIG_USB_MUSB_HCD */ 231 232 #ifdef CONFIG_USB_MUSB_UDC 233 /* USB device configuration */ 234 #define CONFIG_USB_DEVICE 235 #define CONFIG_USB_TTY 236 237 /* Change these to suit your needs */ 238 #define CONFIG_USBD_VENDORID 0x0451 239 #define CONFIG_USBD_PRODUCTID 0x5678 240 #define CONFIG_USBD_MANUFACTURER "Texas Instruments" 241 #define CONFIG_USBD_PRODUCT_NAME "EVM" 242 #endif /* CONFIG_USB_MUSB_UDC */ 243 244 #endif /* CONFIG_USB_OMAP3 */ 245 246 /* ---------------------------------------------------------------------------- 247 * U-Boot features 248 * ---------------------------------------------------------------------------- 249 */ 250 #define CONFIG_SYS_MAXARGS 16 /* max args for a command */ 251 252 #define CONFIG_MISC_INIT_R 253 254 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 255 #define CONFIG_SETUP_MEMORY_TAGS 256 #define CONFIG_INITRD_TAG 257 #define CONFIG_REVISION_TAG 258 259 /* Size of Console IO buffer */ 260 #define CONFIG_SYS_CBSIZE 512 261 262 /* Size of print buffer */ 263 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 264 sizeof(CONFIG_SYS_PROMPT) + 16) 265 266 /* Size of bootarg buffer */ 267 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 268 269 #define CONFIG_BOOTFILE "uImage" 270 271 /* 272 * NAND / OneNAND 273 */ 274 #if defined(CONFIG_CMD_NAND) 275 #define CONFIG_SYS_FLASH_BASE NAND_BASE 276 277 #define CONFIG_NAND_OMAP_GPMC 278 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 279 #elif defined(CONFIG_CMD_ONENAND) 280 #define CONFIG_SYS_FLASH_BASE ONENAND_MAP 281 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 282 #endif 283 284 #if !defined(CONFIG_ENV_IS_NOWHERE) 285 #if defined(CONFIG_CMD_NAND) 286 #define CONFIG_ENV_IS_IN_NAND 287 #elif defined(CONFIG_CMD_ONENAND) 288 #define CONFIG_ENV_IS_IN_ONENAND 289 #define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET 290 #endif 291 #endif /* CONFIG_ENV_IS_NOWHERE */ 292 293 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET 294 295 #if defined(CONFIG_CMD_NET) 296 297 /* Ethernet (SMSC9115 from SMSC9118 family) */ 298 #define CONFIG_SMC911X 299 #define CONFIG_SMC911X_32_BIT 300 #define CONFIG_SMC911X_BASE 0x2C000000 301 302 /* BOOTP fields */ 303 #define CONFIG_BOOTP_SUBNETMASK 0x00000001 304 #define CONFIG_BOOTP_GATEWAY 0x00000002 305 #define CONFIG_BOOTP_HOSTNAME 0x00000004 306 #define CONFIG_BOOTP_BOOTPATH 0x00000010 307 308 #endif /* CONFIG_CMD_NET */ 309 310 /* Support for relocation */ 311 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 312 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 313 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 314 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 315 CONFIG_SYS_INIT_RAM_SIZE - \ 316 GENERATED_GBL_DATA_SIZE) 317 318 /* ----------------------------------------------------------------------------- 319 * Board specific 320 * ----------------------------------------------------------------------------- 321 */ 322 #define CONFIG_SYS_NO_FLASH 323 324 /* Uncomment to define the board revision statically */ 325 /* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */ 326 327 /* Defines for SPL */ 328 #define CONFIG_SPL_FRAMEWORK 329 #define CONFIG_SPL_TEXT_BASE 0x40200800 330 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 331 CONFIG_SPL_TEXT_BASE) 332 333 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 334 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 335 336 #define CONFIG_SPL_BOARD_INIT 337 #define CONFIG_SPL_OMAP3_ID_NAND 338 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" 339 340 /* 341 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 342 * 64 bytes before this address should be set aside for u-boot.img's 343 * header. That is 0x800FFFC0--0x80100000 should not be used for any 344 * other needs. 345 */ 346 #define CONFIG_SYS_TEXT_BASE 0x80100000 347 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 348 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 349 350 /* ----------------------------------------------------------------------------- 351 * Default environment 352 * ----------------------------------------------------------------------------- 353 */ 354 355 #define CONFIG_EXTRA_ENV_SETTINGS \ 356 "loadaddr=0x82000000\0" \ 357 "usbtty=cdc_acm\0" \ 358 "mmcdev=0\0" \ 359 "console=ttyO0,115200n8\0" \ 360 "mmcargs=setenv bootargs console=${console} " \ 361 "root=/dev/mmcblk0p2 rw " \ 362 "rootfstype=ext3 rootwait\0" \ 363 "nandargs=setenv bootargs console=${console} " \ 364 "root=/dev/mtdblock4 rw " \ 365 "rootfstype=jffs2\0" \ 366 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 367 "bootscript=echo Running bootscript from mmc ...; " \ 368 "source ${loadaddr}\0" \ 369 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 370 "mmcboot=echo Booting from mmc ...; " \ 371 "run mmcargs; " \ 372 "bootm ${loadaddr}\0" \ 373 "nandboot=echo Booting from nand ...; " \ 374 "run nandargs; " \ 375 "onenand read ${loadaddr} 280000 400000; " \ 376 "bootm ${loadaddr}\0" \ 377 378 #define CONFIG_BOOTCOMMAND \ 379 "mmc dev ${mmcdev}; if mmc rescan; then " \ 380 "if run loadbootscript; then " \ 381 "run bootscript; " \ 382 "else " \ 383 "if run loaduimage; then " \ 384 "run mmcboot; " \ 385 "else run nandboot; " \ 386 "fi; " \ 387 "fi; " \ 388 "else run nandboot; fi" 389 390 #endif /* __OMAP3EVM_CONFIG_H */ 391