1 /* 2 * (C) Copyright 2006-2008 3 * Texas Instruments. 4 * Author : 5 * Manikandan Pillai <mani.pillai@ti.com> 6 * Derived from Beagle Board and 3430 SDP code by 7 * Richard Woodruff <r-woodruff2@ti.com> 8 * Syed Mohammed Khasim <khasim@ti.com> 9 * 10 * Manikandan Pillai <mani.pillai@ti.com> 11 * 12 * Configuration settings for the TI OMAP3 EVM board. 13 * 14 * See file CREDITS for list of people who contributed to this 15 * project. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation; either version 2 of 20 * the License, or (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * MA 02111-1307 USA 31 */ 32 33 #ifndef __CONFIG_H 34 #define __CONFIG_H 35 36 /* 37 * High Level Configuration Options 38 */ 39 #define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */ 40 #define CONFIG_OMAP 1 /* in a TI OMAP core */ 41 #define CONFIG_OMAP34XX 1 /* which is a 34XX */ 42 #define CONFIG_OMAP3430 1 /* which is in a 3430 */ 43 #define CONFIG_OMAP3_EVM 1 /* working with EVM */ 44 45 #define CONFIG_SDRC /* The chip has SDRC controller */ 46 47 #include <asm/arch/cpu.h> /* get chip and board defs */ 48 #include <asm/arch/omap3.h> 49 50 /* 51 * Display CPU and Board information 52 */ 53 #define CONFIG_DISPLAY_CPUINFO 1 54 #define CONFIG_DISPLAY_BOARDINFO 1 55 56 /* Clock Defines */ 57 #define V_OSCK 26000000 /* Clock output from T2 */ 58 #define V_SCLK (V_OSCK >> 1) 59 60 #undef CONFIG_USE_IRQ /* no support for IRQs */ 61 #define CONFIG_MISC_INIT_R 62 63 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 64 #define CONFIG_SETUP_MEMORY_TAGS 1 65 #define CONFIG_INITRD_TAG 1 66 #define CONFIG_REVISION_TAG 1 67 68 /* 69 * Size of malloc() pool 70 */ 71 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 72 /* Sector */ 73 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 74 /* 75 * Hardware drivers 76 */ 77 78 /* 79 * NS16550 Configuration 80 */ 81 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 82 83 #define CONFIG_SYS_NS16550 84 #define CONFIG_SYS_NS16550_SERIAL 85 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 86 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 87 88 /* 89 * select serial console configuration 90 */ 91 #define CONFIG_CONS_INDEX 1 92 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 93 #define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */ 94 95 /* allow to overwrite serial and ethaddr */ 96 #define CONFIG_ENV_OVERWRITE 97 #define CONFIG_BAUDRATE 115200 98 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 99 115200} 100 #define CONFIG_MMC 1 101 #define CONFIG_OMAP3_MMC 1 102 #define CONFIG_DOS_PARTITION 1 103 104 /* DDR - I use Micron DDR */ 105 #define CONFIG_OMAP3_MICRON_DDR 1 106 107 /* USB 108 * Enable CONFIG_MUSB_HCD for Host functionalities MSC, keyboard 109 * Enable CONFIG_MUSB_UDD for Device functionalities. 110 */ 111 #define CONFIG_USB_OMAP3 1 112 #define CONFIG_MUSB_HCD 1 113 /* #define CONFIG_MUSB_UDC 1 */ 114 115 #ifdef CONFIG_USB_OMAP3 116 117 #ifdef CONFIG_MUSB_HCD 118 #define CONFIG_CMD_USB 119 120 #define CONFIG_USB_STORAGE 121 #define CONGIG_CMD_STORAGE 122 #define CONFIG_CMD_FAT 123 124 #ifdef CONFIG_USB_KEYBOARD 125 #define CONFIG_SYS_USB_EVENT_POLL 126 #define CONFIG_PREBOOT "usb start" 127 #endif /* CONFIG_USB_KEYBOARD */ 128 129 #endif /* CONFIG_MUSB_HCD */ 130 131 #ifdef CONFIG_MUSB_UDC 132 /* USB device configuration */ 133 #define CONFIG_USB_DEVICE 1 134 #define CONFIG_USB_TTY 1 135 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 136 /* Change these to suit your needs */ 137 #define CONFIG_USBD_VENDORID 0x0451 138 #define CONFIG_USBD_PRODUCTID 0x5678 139 #define CONFIG_USBD_MANUFACTURER "Texas Instruments" 140 #define CONFIG_USBD_PRODUCT_NAME "EVM" 141 #endif /* CONFIG_MUSB_UDC */ 142 143 #endif /* CONFIG_USB_OMAP3 */ 144 145 /* commands to include */ 146 #include <config_cmd_default.h> 147 148 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 149 #define CONFIG_CMD_FAT /* FAT support */ 150 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ 151 152 #define CONFIG_CMD_I2C /* I2C serial bus support */ 153 #define CONFIG_CMD_MMC /* MMC support */ 154 #define CONFIG_CMD_NAND /* NAND support */ 155 #define CONFIG_CMD_DHCP 156 #define CONFIG_CMD_PING 157 158 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 159 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 160 #undef CONFIG_CMD_IMI /* iminfo */ 161 #undef CONFIG_CMD_IMLS /* List all found images */ 162 163 #define CONFIG_SYS_NO_FLASH 164 #define CONFIG_HARD_I2C 1 165 #define CONFIG_SYS_I2C_SPEED 100000 166 #define CONFIG_SYS_I2C_SLAVE 1 167 #define CONFIG_SYS_I2C_BUS 0 168 #define CONFIG_SYS_I2C_BUS_SELECT 1 169 #define CONFIG_DRIVER_OMAP34XX_I2C 1 170 171 /* 172 * TWL4030 173 */ 174 #define CONFIG_TWL4030_POWER 1 175 176 /* 177 * Board NAND Info. 178 */ 179 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 180 /* to access nand */ 181 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 182 /* to access */ 183 /* nand at CS0 */ 184 185 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 186 /* NAND devices */ 187 #define CONFIG_JFFS2_NAND 188 /* nand device jffs2 lives on */ 189 #define CONFIG_JFFS2_DEV "nand0" 190 /* start of jffs2 partition */ 191 #define CONFIG_JFFS2_PART_OFFSET 0x680000 192 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */ 193 194 /* Environment information */ 195 #define CONFIG_BOOTDELAY 10 196 197 #define CONFIG_BOOTFILE uImage 198 199 #define CONFIG_EXTRA_ENV_SETTINGS \ 200 "loadaddr=0x82000000\0" \ 201 "usbtty=cdc_acm\0" \ 202 "console=ttyS2,115200n8\0" \ 203 "mmcargs=setenv bootargs console=${console} " \ 204 "root=/dev/mmcblk0p2 rw " \ 205 "rootfstype=ext3 rootwait\0" \ 206 "nandargs=setenv bootargs console=${console} " \ 207 "root=/dev/mtdblock4 rw " \ 208 "rootfstype=jffs2\0" \ 209 "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ 210 "bootscript=echo Running bootscript from mmc ...; " \ 211 "source ${loadaddr}\0" \ 212 "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ 213 "mmcboot=echo Booting from mmc ...; " \ 214 "run mmcargs; " \ 215 "bootm ${loadaddr}\0" \ 216 "nandboot=echo Booting from nand ...; " \ 217 "run nandargs; " \ 218 "onenand read ${loadaddr} 280000 400000; " \ 219 "bootm ${loadaddr}\0" \ 220 221 #define CONFIG_BOOTCOMMAND \ 222 "if mmc init; then " \ 223 "if run loadbootscript; then " \ 224 "run bootscript; " \ 225 "else " \ 226 "if run loaduimage; then " \ 227 "run mmcboot; " \ 228 "else run nandboot; " \ 229 "fi; " \ 230 "fi; " \ 231 "else run nandboot; fi" 232 233 #define CONFIG_AUTO_COMPLETE 1 234 /* 235 * Miscellaneous configurable options 236 */ 237 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 238 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 239 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 240 #define CONFIG_SYS_PROMPT "OMAP3_EVM # " 241 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 242 /* Print Buffer Size */ 243 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 244 sizeof(CONFIG_SYS_PROMPT) + 16) 245 #define CONFIG_SYS_MAXARGS 16 /* max number of command */ 246 /* args */ 247 /* Boot Argument Buffer Size */ 248 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 249 /* memtest works on */ 250 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 251 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 252 0x01F00000) /* 31MB */ 253 254 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 255 /* address */ 256 257 /* 258 * OMAP3 has 12 GP timers, they can be driven by the system clock 259 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 260 * This rate is divided by a local divisor. 261 */ 262 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 263 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 264 #define CONFIG_SYS_HZ 1000 265 266 /*----------------------------------------------------------------------- 267 * Stack sizes 268 * 269 * The stack sizes are set up in start.S using the settings below 270 */ 271 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ 272 #ifdef CONFIG_USE_IRQ 273 #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */ 274 #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */ 275 #endif 276 277 /*----------------------------------------------------------------------- 278 * Physical Memory Map 279 */ 280 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 281 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 282 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */ 283 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 284 285 /* SDRAM Bank Allocation method */ 286 #define SDRC_R_B_C 1 287 288 /*----------------------------------------------------------------------- 289 * FLASH and environment organization 290 */ 291 292 /* **** PISMO SUPPORT *** */ 293 294 /* Configure the PISMO */ 295 #define PISMO1_NAND_SIZE GPMC_SIZE_128M 296 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M 297 298 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 299 300 #if defined(CONFIG_CMD_NAND) 301 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE 302 #elif defined(CONFIG_CMD_ONENAND) 303 #define CONFIG_SYS_FLASH_BASE PISMO1_ONEN_BASE 304 #endif 305 306 /* Monitor at start of flash */ 307 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 308 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 309 310 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ 311 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 312 313 #if defined(CONFIG_CMD_NAND) 314 #define CONFIG_NAND_OMAP_GPMC 315 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 316 #define CONFIG_ENV_IS_IN_NAND 317 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 318 #elif defined(CONFIG_CMD_ONENAND) 319 #define CONFIG_ENV_IS_IN_ONENAND 1 320 #define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET 321 #endif 322 323 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 324 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET 325 326 /* 327 * Support for relocation 328 */ 329 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 330 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 331 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 332 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 333 CONFIG_SYS_INIT_RAM_SIZE - \ 334 GENERATED_GBL_DATA_SIZE) 335 336 /* 337 * Define the board revision statically 338 */ 339 /* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */ 340 341 /*---------------------------------------------------------------------------- 342 * SMSC9115 Ethernet from SMSC9118 family 343 *---------------------------------------------------------------------------- 344 */ 345 #if defined(CONFIG_CMD_NET) 346 347 #define CONFIG_NET_MULTI 348 #define CONFIG_SMC911X 349 #define CONFIG_SMC911X_32_BIT 350 #define CONFIG_SMC911X_BASE 0x2C000000 351 352 #endif /* (CONFIG_CMD_NET) */ 353 354 /* 355 * BOOTP fields 356 */ 357 358 #define CONFIG_BOOTP_SUBNETMASK 0x00000001 359 #define CONFIG_BOOTP_GATEWAY 0x00000002 360 #define CONFIG_BOOTP_HOSTNAME 0x00000004 361 #define CONFIG_BOOTP_BOOTPATH 0x00000010 362 363 #endif /* __CONFIG_H */ 364