1 /* 2 * Configuration settings for the TI OMAP3 EVM board. 3 * 4 * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * Author : 7 * Manikandan Pillai <mani.pillai@ti.com> 8 * Derived from Beagle Board and 3430 SDP code by 9 * Richard Woodruff <r-woodruff2@ti.com> 10 * Syed Mohammed Khasim <khasim@ti.com> 11 * 12 * Manikandan Pillai <mani.pillai@ti.com> 13 * 14 * SPDX-License-Identifier: GPL-2.0+ 15 */ 16 17 #ifndef __OMAP3EVM_CONFIG_H 18 #define __OMAP3EVM_CONFIG_H 19 20 #include <asm/arch/cpu.h> 21 #include <asm/arch/omap.h> 22 23 /* ---------------------------------------------------------------------------- 24 * Supported U-Boot commands 25 * ---------------------------------------------------------------------------- 26 */ 27 28 #define CONFIG_CMD_JFFS2 29 30 #define CONFIG_CMD_NAND 31 32 /* ---------------------------------------------------------------------------- 33 * Supported U-Boot features 34 * ---------------------------------------------------------------------------- 35 */ 36 #define CONFIG_SYS_LONGHELP 37 38 /* Allow to overwrite serial and ethaddr */ 39 #define CONFIG_ENV_OVERWRITE 40 41 /* Add auto-completion support */ 42 #define CONFIG_AUTO_COMPLETE 43 44 /* ---------------------------------------------------------------------------- 45 * Supported hardware 46 * ---------------------------------------------------------------------------- 47 */ 48 49 /* SPL */ 50 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 51 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 52 53 /* Partition tables */ 54 55 /* USB 56 * 57 * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard 58 * Enable CONFIG_USB_MUSB_UDD for Device functionalities. 59 */ 60 #define CONFIG_USB_OMAP3 61 #define CONFIG_USB_MUSB_HCD 62 /* #define CONFIG_USB_MUSB_UDC */ 63 64 /* NAND SPL */ 65 #define CONFIG_SPL_NAND_SIMPLE 66 #define CONFIG_SPL_NAND_BASE 67 #define CONFIG_SPL_NAND_DRIVERS 68 #define CONFIG_SPL_NAND_ECC 69 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 70 #define CONFIG_SYS_NAND_PAGE_COUNT 64 71 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 72 #define CONFIG_SYS_NAND_OOBSIZE 64 73 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 74 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 75 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 76 10, 11, 12, 13} 77 #define CONFIG_SYS_NAND_ECCSIZE 512 78 #define CONFIG_SYS_NAND_ECCBYTES 3 79 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 80 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 81 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 82 83 /* 84 * High level configuration options 85 */ 86 87 #define CONFIG_SDRC /* The chip has SDRC controller */ 88 89 /* 90 * Clock related definitions 91 */ 92 #define V_OSCK 26000000 /* Clock output from T2 */ 93 #define V_SCLK (V_OSCK >> 1) 94 95 /* 96 * OMAP3 has 12 GP timers, they can be driven by the system clock 97 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 98 * This rate is divided by a local divisor. 99 */ 100 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 101 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 102 103 /* Size of environment - 128KB */ 104 #define CONFIG_ENV_SIZE (128 << 10) 105 106 /* Size of malloc pool */ 107 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 108 109 /* 110 * Physical Memory Map 111 * Note 1: CS1 may or may not be populated 112 * Note 2: SDRAM size is expected to be at least 32MB 113 */ 114 #define CONFIG_NR_DRAM_BANKS 2 115 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 116 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 117 118 /* Limits for memtest */ 119 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 120 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 121 0x01F00000) /* 31MB */ 122 123 /* Default load address */ 124 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) 125 126 /* ----------------------------------------------------------------------------- 127 * Hardware drivers 128 * ----------------------------------------------------------------------------- 129 */ 130 131 /* 132 * NS16550 Configuration 133 */ 134 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 135 136 #define CONFIG_SYS_NS16550_SERIAL 137 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 138 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 139 140 /* 141 * select serial console configuration 142 */ 143 #define CONFIG_CONS_INDEX 1 144 #define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */ 145 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 146 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 147 115200} 148 149 /* 150 * I2C 151 */ 152 #define CONFIG_SYS_I2C 153 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 154 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 155 #define CONFIG_SYS_I2C_OMAP34XX 156 157 /* 158 * PISMO support 159 */ 160 /* Monitor at start of flash - Reserve 2 sectors */ 161 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 162 163 #define CONFIG_SYS_MONITOR_LEN (256 << 10) 164 165 /* Start location & size of environment */ 166 #define ONENAND_ENV_OFFSET 0x260000 167 #define SMNAND_ENV_OFFSET 0x260000 168 169 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 170 171 /* 172 * NAND 173 */ 174 /* Physical address to access NAND */ 175 #define CONFIG_SYS_NAND_ADDR NAND_BASE 176 177 /* Physical address to access NAND at CS0 */ 178 #define CONFIG_SYS_NAND_BASE NAND_BASE 179 180 /* Max number of NAND devices */ 181 #define CONFIG_SYS_MAX_NAND_DEVICE 1 182 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 183 /* Timeout values (in ticks) */ 184 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) 185 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) 186 187 /* Flash banks JFFS2 should use */ 188 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ 189 CONFIG_SYS_MAX_NAND_DEVICE) 190 191 #define CONFIG_SYS_JFFS2_MEM_NAND 192 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS 193 #define CONFIG_SYS_JFFS2_NUM_BANKS 1 194 195 #define CONFIG_JFFS2_NAND 196 /* nand device jffs2 lives on */ 197 #define CONFIG_JFFS2_DEV "nand0" 198 /* Start of jffs2 partition */ 199 #define CONFIG_JFFS2_PART_OFFSET 0x680000 200 /* Size of jffs2 partition */ 201 #define CONFIG_JFFS2_PART_SIZE 0xf980000 202 203 /* 204 * USB 205 */ 206 #ifdef CONFIG_USB_OMAP3 207 208 #ifdef CONFIG_USB_MUSB_HCD 209 210 #ifdef CONFIG_USB_KEYBOARD 211 #define CONFIG_SYS_USB_EVENT_POLL 212 #define CONFIG_PREBOOT "usb start" 213 #endif /* CONFIG_USB_KEYBOARD */ 214 215 #endif /* CONFIG_USB_MUSB_HCD */ 216 217 #ifdef CONFIG_USB_MUSB_UDC 218 /* USB device configuration */ 219 #define CONFIG_USB_DEVICE 220 #define CONFIG_USB_TTY 221 222 /* Change these to suit your needs */ 223 #define CONFIG_USBD_VENDORID 0x0451 224 #define CONFIG_USBD_PRODUCTID 0x5678 225 #define CONFIG_USBD_MANUFACTURER "Texas Instruments" 226 #define CONFIG_USBD_PRODUCT_NAME "EVM" 227 #endif /* CONFIG_USB_MUSB_UDC */ 228 229 #endif /* CONFIG_USB_OMAP3 */ 230 231 /* ---------------------------------------------------------------------------- 232 * U-Boot features 233 * ---------------------------------------------------------------------------- 234 */ 235 #define CONFIG_SYS_MAXARGS 16 /* max args for a command */ 236 237 #define CONFIG_MISC_INIT_R 238 239 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 240 #define CONFIG_SETUP_MEMORY_TAGS 241 #define CONFIG_INITRD_TAG 242 #define CONFIG_REVISION_TAG 243 244 /* Size of Console IO buffer */ 245 #define CONFIG_SYS_CBSIZE 512 246 247 /* Size of print buffer */ 248 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 249 sizeof(CONFIG_SYS_PROMPT) + 16) 250 251 /* Size of bootarg buffer */ 252 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 253 254 #define CONFIG_BOOTFILE "uImage" 255 256 /* 257 * NAND / OneNAND 258 */ 259 #if defined(CONFIG_CMD_NAND) 260 #define CONFIG_SYS_FLASH_BASE NAND_BASE 261 262 #define CONFIG_NAND_OMAP_GPMC 263 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 264 #elif defined(CONFIG_CMD_ONENAND) 265 #define CONFIG_SYS_FLASH_BASE ONENAND_MAP 266 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 267 #endif 268 269 #if !defined(CONFIG_ENV_IS_NOWHERE) 270 #if defined(CONFIG_CMD_NAND) 271 #define CONFIG_ENV_IS_IN_NAND 272 #elif defined(CONFIG_CMD_ONENAND) 273 #define CONFIG_ENV_IS_IN_ONENAND 274 #define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET 275 #endif 276 #endif /* CONFIG_ENV_IS_NOWHERE */ 277 278 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET 279 280 #if defined(CONFIG_CMD_NET) 281 282 /* Ethernet (SMSC9115 from SMSC9118 family) */ 283 #define CONFIG_SMC911X 284 #define CONFIG_SMC911X_32_BIT 285 #define CONFIG_SMC911X_BASE 0x2C000000 286 287 /* BOOTP fields */ 288 #define CONFIG_BOOTP_SUBNETMASK 0x00000001 289 #define CONFIG_BOOTP_GATEWAY 0x00000002 290 #define CONFIG_BOOTP_HOSTNAME 0x00000004 291 #define CONFIG_BOOTP_BOOTPATH 0x00000010 292 293 #endif /* CONFIG_CMD_NET */ 294 295 /* Support for relocation */ 296 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 297 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 298 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 299 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 300 CONFIG_SYS_INIT_RAM_SIZE - \ 301 GENERATED_GBL_DATA_SIZE) 302 303 /* ----------------------------------------------------------------------------- 304 * Board specific 305 * ----------------------------------------------------------------------------- 306 */ 307 308 /* Uncomment to define the board revision statically */ 309 /* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */ 310 311 /* Defines for SPL */ 312 #define CONFIG_SPL_FRAMEWORK 313 #define CONFIG_SPL_TEXT_BASE 0x40200800 314 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 315 CONFIG_SPL_TEXT_BASE) 316 317 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 318 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 319 320 #define CONFIG_SPL_OMAP3_ID_NAND 321 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" 322 323 /* 324 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 325 * 64 bytes before this address should be set aside for u-boot.img's 326 * header. That is 0x800FFFC0--0x80100000 should not be used for any 327 * other needs. 328 */ 329 #define CONFIG_SYS_TEXT_BASE 0x80100000 330 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 331 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 332 333 /* ----------------------------------------------------------------------------- 334 * Default environment 335 * ----------------------------------------------------------------------------- 336 */ 337 338 #define CONFIG_EXTRA_ENV_SETTINGS \ 339 "loadaddr=0x82000000\0" \ 340 "usbtty=cdc_acm\0" \ 341 "mmcdev=0\0" \ 342 "console=ttyO0,115200n8\0" \ 343 "mmcargs=setenv bootargs console=${console} " \ 344 "root=/dev/mmcblk0p2 rw " \ 345 "rootfstype=ext3 rootwait\0" \ 346 "nandargs=setenv bootargs console=${console} " \ 347 "root=/dev/mtdblock4 rw " \ 348 "rootfstype=jffs2\0" \ 349 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 350 "bootscript=echo Running bootscript from mmc ...; " \ 351 "source ${loadaddr}\0" \ 352 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 353 "mmcboot=echo Booting from mmc ...; " \ 354 "run mmcargs; " \ 355 "bootm ${loadaddr}\0" \ 356 "nandboot=echo Booting from nand ...; " \ 357 "run nandargs; " \ 358 "onenand read ${loadaddr} 280000 400000; " \ 359 "bootm ${loadaddr}\0" \ 360 361 #define CONFIG_BOOTCOMMAND \ 362 "mmc dev ${mmcdev}; if mmc rescan; then " \ 363 "if run loadbootscript; then " \ 364 "run bootscript; " \ 365 "else " \ 366 "if run loaduimage; then " \ 367 "run mmcboot; " \ 368 "else run nandboot; " \ 369 "fi; " \ 370 "fi; " \ 371 "else run nandboot; fi" 372 373 #endif /* __OMAP3EVM_CONFIG_H */ 374