1 /*
2  * (C) Copyright 2006-2008
3  * Texas Instruments.
4  * Richard Woodruff <r-woodruff2@ti.com>
5  * Syed Mohammed Khasim <x0khasim@ti.com>
6  *
7  * Configuration settings for the TI OMAP3530 Beagle board.
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  */
11 
12 #ifndef __CONFIG_H
13 #define __CONFIG_H
14 
15 #define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
16 
17 /*
18  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
19  * 64 bytes before this address should be set aside for u-boot.img's
20  * header. That is 0x800FFFC0--0x80100000 should not be used for any
21  * other needs.  We use this rather than the inherited defines from
22  * ti_armv7_common.h for backwards compatibility.
23  */
24 #define CONFIG_SYS_TEXT_BASE		0x80100000
25 #define CONFIG_SPL_BSS_START_ADDR	0x80000000
26 #define CONFIG_SPL_BSS_MAX_SIZE		(512 << 10)	/* 512 KB */
27 #define CONFIG_SYS_SPL_MALLOC_START	0x80208000
28 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
29 
30 #include <configs/ti_omap3_common.h>
31 
32 /*
33  * Display CPU and Board information
34  */
35 #define CONFIG_DISPLAY_CPUINFO		1
36 #define CONFIG_DISPLAY_BOARDINFO	1
37 
38 #define CONFIG_MISC_INIT_R
39 
40 #define CONFIG_REVISION_TAG		1
41 #define CONFIG_ENV_OVERWRITE
42 
43 /* Status LED */
44 #define CONFIG_STATUS_LED		1
45 #define CONFIG_BOARD_SPECIFIC_LED	1
46 #define STATUS_LED_BIT			0x01
47 #define STATUS_LED_STATE		STATUS_LED_ON
48 #define STATUS_LED_PERIOD		(CONFIG_SYS_HZ / 2)
49 #define STATUS_LED_BIT1			0x02
50 #define STATUS_LED_STATE1		STATUS_LED_ON
51 #define STATUS_LED_PERIOD1		(CONFIG_SYS_HZ / 2)
52 #define STATUS_LED_BOOT			STATUS_LED_BIT
53 #define STATUS_LED_GREEN		STATUS_LED_BIT1
54 
55 /* Enable Multi Bus support for I2C */
56 #define CONFIG_I2C_MULTI_BUS		1
57 
58 /* Probe all devices */
59 #define CONFIG_SYS_I2C_NOPROBES		{{0x0, 0x0}}
60 
61 /* USB */
62 #define CONFIG_USB_MUSB_OMAP2PLUS
63 #define CONFIG_USB_MUSB_PIO_ONLY
64 #define CONFIG_TWL4030_USB		1
65 #define CONFIG_USB_ETHER
66 #define CONFIG_USB_ETHER_RNDIS
67 #define CONFIG_USB_FUNCTION_FASTBOOT
68 #define CONFIG_CMD_FASTBOOT
69 #define CONFIG_ANDROID_BOOT_IMAGE
70 #define CONFIG_FASTBOOT_BUF_ADDR	CONFIG_SYS_LOAD_ADDR
71 #define CONFIG_FASTBOOT_BUF_SIZE	0x07000000
72 
73 /* USB EHCI */
74 #define CONFIG_USB_EHCI
75 
76 #define CONFIG_USB_EHCI_OMAP
77 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	147
78 
79 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
80 #define CONFIG_USB_HOST_ETHER
81 #define CONFIG_USB_ETHER_ASIX
82 #define CONFIG_USB_ETHER_MCS7830
83 #define CONFIG_USB_ETHER_SMSC95XX
84 
85 /* GPIO banks */
86 #define CONFIG_OMAP3_GPIO_5		/* GPIO128..159 is in GPIO bank 5 */
87 #define CONFIG_OMAP3_GPIO_6		/* GPIO160..191 is in GPIO bank 6 */
88 
89 /* commands to include */
90 
91 #define MTDIDS_DEFAULT			"nand0=nand"
92 #define MTDPARTS_DEFAULT		"mtdparts=nand:512k(x-loader),"\
93 					"1920k(u-boot),128k(u-boot-env),"\
94 					"4m(kernel),-(fs)"
95 
96 #define CONFIG_CMD_NAND		/* NAND support			*/
97 #define CONFIG_CMD_LED		/* LED support			*/
98 
99 #define CONFIG_VIDEO_OMAP3	/* DSS Support			*/
100 
101 /*
102  * TWL4030
103  */
104 #define CONFIG_TWL4030_LED		1
105 
106 /*
107  * Board NAND Info.
108  */
109 #define CONFIG_NAND_OMAP_GPMC
110 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
111 							/* devices */
112 
113 #define CONFIG_EXTRA_ENV_SETTINGS \
114 	"loadaddr=0x80200000\0" \
115 	"rdaddr=0x81000000\0" \
116 	"fdt_high=0xffffffff\0" \
117 	"fdtaddr=0x80f80000\0" \
118 	"usbtty=cdc_acm\0" \
119 	"bootfile=uImage\0" \
120 	"ramdisk=ramdisk.gz\0" \
121 	"bootdir=/boot\0" \
122 	"bootpart=0:2\0" \
123 	"console=ttyO2,115200n8\0" \
124 	"mpurate=auto\0" \
125 	"buddy=none\0" \
126 	"optargs=\0" \
127 	"camera=none\0" \
128 	"vram=12M\0" \
129 	"dvimode=640x480MR-16@60\0" \
130 	"defaultdisplay=dvi\0" \
131 	"mmcdev=0\0" \
132 	"mmcroot=/dev/mmcblk0p2 rw\0" \
133 	"mmcrootfstype=ext3 rootwait\0" \
134 	"nandroot=ubi0:rootfs ubi.mtd=4\0" \
135 	"nandrootfstype=ubifs\0" \
136 	"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \
137 	"ramrootfstype=ext2\0" \
138 	"mmcargs=setenv bootargs console=${console} " \
139 		"${optargs} " \
140 		"mpurate=${mpurate} " \
141 		"buddy=${buddy} "\
142 		"camera=${camera} "\
143 		"vram=${vram} " \
144 		"omapfb.mode=dvi:${dvimode} " \
145 		"omapdss.def_disp=${defaultdisplay} " \
146 		"root=${mmcroot} " \
147 		"rootfstype=${mmcrootfstype}\0" \
148 	"nandargs=setenv bootargs console=${console} " \
149 		"${optargs} " \
150 		"mpurate=${mpurate} " \
151 		"buddy=${buddy} "\
152 		"camera=${camera} "\
153 		"vram=${vram} " \
154 		"omapfb.mode=dvi:${dvimode} " \
155 		"omapdss.def_disp=${defaultdisplay} " \
156 		"root=${nandroot} " \
157 		"rootfstype=${nandrootfstype}\0" \
158 	"findfdt=" \
159 		"if test $beaglerev = AxBx; then " \
160 			"setenv fdtfile omap3-beagle.dtb; fi; " \
161 		"if test $beaglerev = Cx; then " \
162 			"setenv fdtfile omap3-beagle.dtb; fi; " \
163 		"if test $beaglerev = C4; then " \
164 			"setenv fdtfile omap3-beagle.dtb; fi; " \
165 		"if test $beaglerev = xMAB; then " \
166 			"setenv fdtfile omap3-beagle-xm-ab.dtb; fi; " \
167 		"if test $beaglerev = xMC; then " \
168 			"setenv fdtfile omap3-beagle-xm.dtb; fi; " \
169 		"if test $fdtfile = undefined; then " \
170 			"echo WARNING: Could not determine device tree to use; fi; \0" \
171 	"validatefdt=" \
172 		"if test $beaglerev = xMAB; then " \
173 			"if test ! -e mmc ${bootpart} ${bootdir}/${fdtfile}; then " \
174 				"setenv fdtfile omap3-beagle-xm.dtb; " \
175 			"fi; " \
176 		"fi; \0" \
177 	"bootenv=uEnv.txt\0" \
178 	"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
179 	"importbootenv=echo Importing environment from mmc ...; " \
180 		"env import -t -r $loadaddr $filesize\0" \
181 	"ramargs=setenv bootargs console=${console} " \
182 		"${optargs} " \
183 		"mpurate=${mpurate} " \
184 		"buddy=${buddy} "\
185 		"vram=${vram} " \
186 		"omapfb.mode=dvi:${dvimode} " \
187 		"omapdss.def_disp=${defaultdisplay} " \
188 		"root=${ramroot} " \
189 		"rootfstype=${ramrootfstype}\0" \
190 	"loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \
191 	"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
192 	"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
193 	"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
194 		"source ${loadaddr}\0" \
195 	"loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
196 	"mmcboot=echo Booting from mmc ...; " \
197 		"run mmcargs; " \
198 		"bootm ${loadaddr}\0" \
199 	"mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \
200 		"run mmcargs; " \
201 		"bootz ${loadaddr} - ${fdtaddr}\0" \
202 	"nandboot=echo Booting from nand ...; " \
203 		"run nandargs; " \
204 		"nand read ${loadaddr} 280000 400000; " \
205 		"bootm ${loadaddr}\0" \
206 	"ramboot=echo Booting from ramdisk ...; " \
207 		"run ramargs; " \
208 		"bootm ${loadaddr}\0" \
209 	"userbutton=if gpio input 173; then run userbutton_xm; " \
210 		"else run userbutton_nonxm; fi;\0" \
211 	"userbutton_xm=gpio input 4;\0" \
212 	"userbutton_nonxm=gpio input 7;\0"
213 /* "run userbutton" will return 1 (false) if pressed and 0 (true) if not */
214 #define CONFIG_BOOTCOMMAND \
215 	"run findfdt; " \
216 	"mmc dev ${mmcdev}; if mmc rescan; then " \
217 		"if run userbutton; then " \
218 			"setenv bootenv uEnv.txt;" \
219 		"else " \
220 			"setenv bootenv user.txt;" \
221 		"fi;" \
222 		"echo SD/MMC found on device ${mmcdev};" \
223 		"if run loadbootenv; then " \
224 			"echo Loaded environment from ${bootenv};" \
225 			"run importbootenv;" \
226 		"fi;" \
227 		"if test -n $uenvcmd; then " \
228 			"echo Running uenvcmd ...;" \
229 			"run uenvcmd;" \
230 		"fi;" \
231 		"if run loadbootscript; then " \
232 			"run bootscript; " \
233 		"else " \
234 			"if run loadimage; then " \
235 				"run mmcboot;" \
236 			"fi;" \
237 		"fi; " \
238 	"fi;" \
239 	"run nandboot;" \
240 	"setenv bootfile zImage;" \
241 	"if run loadimage; then " \
242 		"run loadfdt;" \
243 		"run mmcbootz; " \
244 	"fi; " \
245 
246 /*
247  * OMAP3 has 12 GP timers, they can be driven by the system clock
248  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
249  * This rate is divided by a local divisor.
250  */
251 #define CONFIG_SYS_PTV			2       /* Divisor: 2^(PTV+1) => 8 */
252 
253 /*-----------------------------------------------------------------------
254  * FLASH and environment organization
255  */
256 
257 /* **** PISMO SUPPORT *** */
258 #if defined(CONFIG_CMD_NAND)
259 #define CONFIG_SYS_FLASH_BASE		NAND_BASE
260 #endif
261 
262 /* Monitor at start of flash */
263 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
264 #define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
265 
266 #define CONFIG_ENV_IS_IN_NAND		1
267 #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
268 #define ONENAND_ENV_OFFSET		0x260000 /* environment starts here */
269 #define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
270 
271 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
272 #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
273 #define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET
274 
275 #define CONFIG_OMAP3_SPI
276 
277 /* Defines for SPL */
278 #define CONFIG_SPL_OMAP3_ID_NAND
279 
280 /* NAND boot config */
281 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
282 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
283 #define CONFIG_SYS_NAND_PAGE_COUNT	64
284 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
285 #define CONFIG_SYS_NAND_OOBSIZE		64
286 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
287 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
288 #define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9,\
289 						10, 11, 12, 13}
290 #define CONFIG_SYS_NAND_ECCSIZE		512
291 #define CONFIG_SYS_NAND_ECCBYTES	3
292 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_HAM1_CODE_HW
293 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
294 /* NAND: SPL falcon mode configs */
295 #ifdef CONFIG_SPL_OS_BOOT
296 #define CONFIG_CMD_SPL_NAND_OFS		0x240000
297 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x280000
298 #define CONFIG_CMD_SPL_WRITE_SIZE	0x2000
299 #endif
300 
301 #endif /* __CONFIG_H */
302