1 /* 2 * (C) Copyright 2006-2008 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com> 6 * 7 * Configuration settings for the TI OMAP3530 Beagle board. 8 * 9 * See file CREDITS for list of people who contributed to this 10 * project. 11 * 12 * This program is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License as 14 * published by the Free Software Foundation; either version 2 of 15 * the License, or (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 25 * MA 02111-1307 USA 26 */ 27 28 #ifndef __CONFIG_H 29 #define __CONFIG_H 30 31 /* 32 * High Level Configuration Options 33 */ 34 #define CONFIG_OMAP 1 /* in a TI OMAP core */ 35 #define CONFIG_OMAP34XX 1 /* which is a 34XX */ 36 #define CONFIG_OMAP3_BEAGLE 1 /* working with BEAGLE */ 37 #define CONFIG_OMAP_GPIO 38 39 #define CONFIG_SDRC /* The chip has SDRC controller */ 40 41 #include <asm/arch/cpu.h> /* get chip and board defs */ 42 #include <asm/arch/omap3.h> 43 44 /* 45 * Display CPU and Board information 46 */ 47 #define CONFIG_DISPLAY_CPUINFO 1 48 #define CONFIG_DISPLAY_BOARDINFO 1 49 50 /* Clock Defines */ 51 #define V_OSCK 26000000 /* Clock output from T2 */ 52 #define V_SCLK (V_OSCK >> 1) 53 54 #define CONFIG_MISC_INIT_R 55 56 #define CONFIG_OF_LIBFDT 1 57 58 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 59 #define CONFIG_SETUP_MEMORY_TAGS 1 60 #define CONFIG_INITRD_TAG 1 61 #define CONFIG_REVISION_TAG 1 62 63 /* 64 * Size of malloc() pool 65 */ 66 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 67 /* Sector */ 68 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 69 70 /* 71 * Hardware drivers 72 */ 73 74 /* 75 * NS16550 Configuration 76 */ 77 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 78 79 #define CONFIG_SYS_NS16550 80 #define CONFIG_SYS_NS16550_SERIAL 81 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 82 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 83 84 /* 85 * select serial console configuration 86 */ 87 #define CONFIG_CONS_INDEX 3 88 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 89 #define CONFIG_SERIAL3 3 /* UART3 on Beagle Rev 2 */ 90 91 /* allow to overwrite serial and ethaddr */ 92 #define CONFIG_ENV_OVERWRITE 93 #define CONFIG_BAUDRATE 115200 94 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 95 115200} 96 #define CONFIG_GENERIC_MMC 1 97 #define CONFIG_MMC 1 98 #define CONFIG_OMAP_HSMMC 1 99 #define CONFIG_DOS_PARTITION 1 100 101 /* Status LED */ 102 #define CONFIG_STATUS_LED 1 103 #define CONFIG_BOARD_SPECIFIC_LED 1 104 #define STATUS_LED_BIT 0x01 105 #define STATUS_LED_STATE STATUS_LED_ON 106 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 107 #define STATUS_LED_BIT1 0x02 108 #define STATUS_LED_STATE1 STATUS_LED_ON 109 #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) 110 #define STATUS_LED_BOOT STATUS_LED_BIT 111 #define STATUS_LED_GREEN STATUS_LED_BIT1 112 113 /* Enable Multi Bus support for I2C */ 114 #define CONFIG_I2C_MULTI_BUS 1 115 116 /* Probe all devices */ 117 #define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}} 118 119 /* USB */ 120 #define CONFIG_MUSB_GADGET 121 #define CONFIG_USB_MUSB_OMAP2PLUS 122 #define CONFIG_MUSB_PIO_ONLY 123 #define CONFIG_USB_GADGET_DUALSPEED 124 #define CONFIG_TWL4030_USB 1 125 #define CONFIG_USB_ETHER 126 #define CONFIG_USB_ETHER_RNDIS 127 128 /* USB EHCI */ 129 #define CONFIG_CMD_USB 130 #define CONFIG_USB_EHCI 131 132 #define CONFIG_USB_EHCI_OMAP 133 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147 134 135 #define CONFIG_USB_ULPI 136 #define CONFIG_USB_ULPI_VIEWPORT_OMAP 137 138 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 139 #define CONFIG_USB_HOST_ETHER 140 #define CONFIG_USB_ETHER_SMSC95XX 141 #define CONFIG_USB_ETHER_ASIX 142 143 144 /* commands to include */ 145 #include <config_cmd_default.h> 146 147 #define CONFIG_CMD_ASKENV 148 149 #define CONFIG_CMD_CACHE 150 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 151 #define CONFIG_CMD_FAT /* FAT support */ 152 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ 153 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 154 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 155 #define MTDIDS_DEFAULT "nand0=nand" 156 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 157 "1920k(u-boot),128k(u-boot-env),"\ 158 "4m(kernel),-(fs)" 159 160 #define CONFIG_CMD_I2C /* I2C serial bus support */ 161 #define CONFIG_CMD_MMC /* MMC support */ 162 #define CONFIG_USB_STORAGE /* USB storage support */ 163 #define CONFIG_CMD_NAND /* NAND support */ 164 #define CONFIG_CMD_LED /* LED support */ 165 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ 166 #define CONFIG_CMD_NFS /* NFS support */ 167 #define CONFIG_CMD_PING 168 #define CONFIG_CMD_DHCP 169 #define CONFIG_CMD_SETEXPR /* Evaluate expressions */ 170 #define CONFIG_CMD_GPIO /* Enable gpio command */ 171 172 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 173 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 174 #undef CONFIG_CMD_IMI /* iminfo */ 175 #undef CONFIG_CMD_IMLS /* List all found images */ 176 177 #define CONFIG_SYS_NO_FLASH 178 #define CONFIG_HARD_I2C 1 179 #define CONFIG_SYS_I2C_SPEED 100000 180 #define CONFIG_SYS_I2C_SLAVE 1 181 #define CONFIG_I2C_MULTI_BUS 1 182 #define CONFIG_DRIVER_OMAP34XX_I2C 1 183 #define CONFIG_VIDEO_OMAP3 /* DSS Support */ 184 185 /* 186 * TWL4030 187 */ 188 #define CONFIG_TWL4030_POWER 1 189 #define CONFIG_TWL4030_LED 1 190 191 /* 192 * Board NAND Info. 193 */ 194 #define CONFIG_SYS_NAND_QUIET_TEST 1 195 #define CONFIG_NAND_OMAP_GPMC 196 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 197 /* to access nand */ 198 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 199 /* to access nand at */ 200 /* CS0 */ 201 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 202 203 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 204 /* devices */ 205 #define CONFIG_JFFS2_NAND 206 /* nand device jffs2 lives on */ 207 #define CONFIG_JFFS2_DEV "nand0" 208 /* start of jffs2 partition */ 209 #define CONFIG_JFFS2_PART_OFFSET 0x680000 210 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ 211 /* partition */ 212 213 /* Environment information */ 214 #define CONFIG_BOOTDELAY 3 215 216 #define CONFIG_EXTRA_ENV_SETTINGS \ 217 "loadaddr=0x80200000\0" \ 218 "rdaddr=0x81000000\0" \ 219 "usbtty=cdc_acm\0" \ 220 "bootfile=uImage.beagle\0" \ 221 "console=ttyO2,115200n8\0" \ 222 "mpurate=auto\0" \ 223 "buddy=none\0" \ 224 "optargs=\0" \ 225 "camera=none\0" \ 226 "vram=12M\0" \ 227 "dvimode=640x480MR-16@60\0" \ 228 "defaultdisplay=dvi\0" \ 229 "mmcdev=0\0" \ 230 "mmcroot=/dev/mmcblk0p2 rw\0" \ 231 "mmcrootfstype=ext3 rootwait\0" \ 232 "nandroot=ubi0:rootfs ubi.mtd=4\0" \ 233 "nandrootfstype=ubifs\0" \ 234 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \ 235 "ramrootfstype=ext2\0" \ 236 "mmcargs=setenv bootargs console=${console} " \ 237 "${optargs} " \ 238 "mpurate=${mpurate} " \ 239 "buddy=${buddy} "\ 240 "camera=${camera} "\ 241 "vram=${vram} " \ 242 "omapfb.mode=dvi:${dvimode} " \ 243 "omapdss.def_disp=${defaultdisplay} " \ 244 "root=${mmcroot} " \ 245 "rootfstype=${mmcrootfstype}\0" \ 246 "nandargs=setenv bootargs console=${console} " \ 247 "${optargs} " \ 248 "mpurate=${mpurate} " \ 249 "buddy=${buddy} "\ 250 "camera=${camera} "\ 251 "vram=${vram} " \ 252 "omapfb.mode=dvi:${dvimode} " \ 253 "omapdss.def_disp=${defaultdisplay} " \ 254 "root=${nandroot} " \ 255 "rootfstype=${nandrootfstype}\0" \ 256 "bootenv=uEnv.txt\0" \ 257 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ 258 "importbootenv=echo Importing environment from mmc ...; " \ 259 "env import -t $loadaddr $filesize\0" \ 260 "ramargs=setenv bootargs console=${console} " \ 261 "${optargs} " \ 262 "mpurate=${mpurate} " \ 263 "buddy=${buddy} "\ 264 "vram=${vram} " \ 265 "omapfb.mode=dvi:${dvimode} " \ 266 "omapdss.def_disp=${defaultdisplay} " \ 267 "root=${ramroot} " \ 268 "rootfstype=${ramrootfstype}\0" \ 269 "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \ 270 "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 271 "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} /boot/uImage\0" \ 272 "mmcboot=echo Booting from mmc ...; " \ 273 "run mmcargs; " \ 274 "bootm ${loadaddr}\0" \ 275 "nandboot=echo Booting from nand ...; " \ 276 "run nandargs; " \ 277 "nand read ${loadaddr} 280000 400000; " \ 278 "bootm ${loadaddr}\0" \ 279 "ramboot=echo Booting from ramdisk ...; " \ 280 "run ramargs; " \ 281 "bootm ${loadaddr}\0" \ 282 "userbutton=if gpio input 173; then run userbutton_xm; " \ 283 "else run userbutton_nonxm; fi;\0" \ 284 "userbutton_xm=gpio input 4;\0" \ 285 "userbutton_nonxm=gpio input 7;\0" 286 /* "run userbutton" will return 1 (false) if pressed and 0 (true) if not */ 287 #define CONFIG_BOOTCOMMAND \ 288 "mmc dev ${mmcdev}; if mmc rescan; then " \ 289 "if run userbutton; then " \ 290 "setenv bootenv uEnv.txt;" \ 291 "else " \ 292 "setenv bootenv user.txt;" \ 293 "fi;" \ 294 "echo SD/MMC found on device ${mmcdev};" \ 295 "if run loadbootenv; then " \ 296 "echo Loaded environment from ${bootenv};" \ 297 "run importbootenv;" \ 298 "fi;" \ 299 "if test -n $uenvcmd; then " \ 300 "echo Running uenvcmd ...;" \ 301 "run uenvcmd;" \ 302 "fi;" \ 303 "if run loaduimage; then " \ 304 "run mmcboot;" \ 305 "fi;" \ 306 "fi;" \ 307 "run nandboot;" \ 308 309 #define CONFIG_AUTO_COMPLETE 1 310 /* 311 * Miscellaneous configurable options 312 */ 313 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 314 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 315 #define CONFIG_SYS_PROMPT "OMAP3 beagleboard.org # " 316 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 317 /* Print Buffer Size */ 318 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 319 sizeof(CONFIG_SYS_PROMPT) + 16) 320 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 321 /* Boot Argument Buffer Size */ 322 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 323 324 #define CONFIG_SYS_ALT_MEMTEST 1 325 #define CONFIG_SYS_MEMTEST_START (0x82000000) /* memtest */ 326 /* defaults */ 327 #define CONFIG_SYS_MEMTEST_END (0x87FFFFFF) /* 128MB */ 328 #define CONFIG_SYS_MEMTEST_SCRATCH (0x81000000) /* dummy address */ 329 330 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ 331 /* load address */ 332 333 /* 334 * OMAP3 has 12 GP timers, they can be driven by the system clock 335 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 336 * This rate is divided by a local divisor. 337 */ 338 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 339 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 340 #define CONFIG_SYS_HZ 1000 341 342 /*----------------------------------------------------------------------- 343 * Physical Memory Map 344 */ 345 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 346 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 347 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 348 349 /*----------------------------------------------------------------------- 350 * FLASH and environment organization 351 */ 352 353 /* **** PISMO SUPPORT *** */ 354 355 /* Configure the PISMO */ 356 #define PISMO1_NAND_SIZE GPMC_SIZE_128M 357 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M 358 359 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 360 361 #if defined(CONFIG_CMD_NAND) 362 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE 363 #endif 364 365 /* Monitor at start of flash */ 366 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 367 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 368 369 #define CONFIG_ENV_IS_IN_NAND 1 370 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ 371 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 372 373 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 374 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 375 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 376 377 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 378 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 379 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 380 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 381 CONFIG_SYS_INIT_RAM_SIZE - \ 382 GENERATED_GBL_DATA_SIZE) 383 384 #define CONFIG_OMAP3_SPI 385 386 #define CONFIG_SYS_CACHELINE_SIZE 64 387 388 /* Defines for SPL */ 389 #define CONFIG_SPL 390 #define CONFIG_SPL_FRAMEWORK 391 #define CONFIG_SPL_NAND_SIMPLE 392 #define CONFIG_SPL_TEXT_BASE 0x40200800 393 #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ 394 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 395 396 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 397 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 398 399 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 400 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 401 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 402 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 403 404 #define CONFIG_SPL_BOARD_INIT 405 #define CONFIG_SPL_LIBCOMMON_SUPPORT 406 #define CONFIG_SPL_LIBDISK_SUPPORT 407 #define CONFIG_SPL_I2C_SUPPORT 408 #define CONFIG_SPL_LIBGENERIC_SUPPORT 409 #define CONFIG_SPL_MMC_SUPPORT 410 #define CONFIG_SPL_FAT_SUPPORT 411 #define CONFIG_SPL_SERIAL_SUPPORT 412 #define CONFIG_SPL_NAND_SUPPORT 413 #define CONFIG_SPL_NAND_BASE 414 #define CONFIG_SPL_NAND_DRIVERS 415 #define CONFIG_SPL_NAND_ECC 416 #define CONFIG_SPL_GPIO_SUPPORT 417 #define CONFIG_SPL_POWER_SUPPORT 418 #define CONFIG_SPL_OMAP3_ID_NAND 419 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 420 421 /* NAND boot config */ 422 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 423 #define CONFIG_SYS_NAND_PAGE_COUNT 64 424 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 425 #define CONFIG_SYS_NAND_OOBSIZE 64 426 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 427 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 428 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 429 10, 11, 12, 13} 430 #define CONFIG_SYS_NAND_ECCSIZE 512 431 #define CONFIG_SYS_NAND_ECCBYTES 3 432 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 433 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 434 435 /* 436 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 437 * 64 bytes before this address should be set aside for u-boot.img's 438 * header. That is 0x800FFFC0--0x80100000 should not be used for any 439 * other needs. 440 */ 441 #define CONFIG_SYS_TEXT_BASE 0x80100000 442 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 443 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 444 445 #endif /* __CONFIG_H */ 446