1 /*
2  * (C) Copyright 2006-2008
3  * Texas Instruments.
4  * Richard Woodruff <r-woodruff2@ti.com>
5  * Syed Mohammed Khasim <x0khasim@ti.com>
6  *
7  * Configuration settings for the TI OMAP3530 Beagle board.
8  *
9  * See file CREDITS for list of people who contributed to this
10  * project.
11  *
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License as
14  * published by the Free Software Foundation; either version 2 of
15  * the License, or (at your option) any later version.
16  *
17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
20  * GNU General Public License for more details.
21  *
22  * You should have received a copy of the GNU General Public License
23  * along with this program; if not, write to the Free Software
24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25  * MA 02111-1307 USA
26  */
27 
28 #ifndef __CONFIG_H
29 #define __CONFIG_H
30 
31 /*
32  * High Level Configuration Options
33  */
34 #define CONFIG_OMAP		1	/* in a TI OMAP core */
35 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
36 #define CONFIG_OMAP3_BEAGLE	1	/* working with BEAGLE */
37 #define CONFIG_OMAP_GPIO
38 
39 #define CONFIG_SDRC	/* The chip has SDRC controller */
40 
41 #include <asm/arch/cpu.h>		/* get chip and board defs */
42 #include <asm/arch/omap3.h>
43 
44 /*
45  * Display CPU and Board information
46  */
47 #define CONFIG_DISPLAY_CPUINFO		1
48 #define CONFIG_DISPLAY_BOARDINFO	1
49 
50 /* Clock Defines */
51 #define V_OSCK			26000000	/* Clock output from T2 */
52 #define V_SCLK			(V_OSCK >> 1)
53 
54 #undef CONFIG_USE_IRQ				/* no support for IRQs */
55 #define CONFIG_MISC_INIT_R
56 
57 #define CONFIG_OF_LIBFDT		1
58 
59 #define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
60 #define CONFIG_SETUP_MEMORY_TAGS	1
61 #define CONFIG_INITRD_TAG		1
62 #define CONFIG_REVISION_TAG		1
63 
64 /*
65  * Size of malloc() pool
66  */
67 #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
68 						/* Sector */
69 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10))
70 
71 /*
72  * Hardware drivers
73  */
74 
75 /*
76  * NS16550 Configuration
77  */
78 #define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */
79 
80 #define CONFIG_SYS_NS16550
81 #define CONFIG_SYS_NS16550_SERIAL
82 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
83 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
84 
85 /*
86  * select serial console configuration
87  */
88 #define CONFIG_CONS_INDEX		3
89 #define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
90 #define CONFIG_SERIAL3			3	/* UART3 on Beagle Rev 2 */
91 
92 /* allow to overwrite serial and ethaddr */
93 #define CONFIG_ENV_OVERWRITE
94 #define CONFIG_BAUDRATE			115200
95 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
96 					115200}
97 #define CONFIG_GENERIC_MMC		1
98 #define CONFIG_MMC			1
99 #define CONFIG_OMAP_HSMMC		1
100 #define CONFIG_DOS_PARTITION		1
101 
102 /* Status LED */
103 #define CONFIG_STATUS_LED		1
104 #define CONFIG_BOARD_SPECIFIC_LED	1
105 #define STATUS_LED_BIT			0x01
106 #define STATUS_LED_STATE		STATUS_LED_ON
107 #define STATUS_LED_PERIOD		(CONFIG_SYS_HZ / 2)
108 #define STATUS_LED_BIT1			0x02
109 #define STATUS_LED_STATE1		STATUS_LED_ON
110 #define STATUS_LED_PERIOD1		(CONFIG_SYS_HZ / 2)
111 #define STATUS_LED_BOOT			STATUS_LED_BIT
112 #define STATUS_LED_GREEN		STATUS_LED_BIT1
113 
114 /* Enable Multi Bus support for I2C */
115 #define CONFIG_I2C_MULTI_BUS		1
116 
117 /* Probe all devices */
118 #define CONFIG_SYS_I2C_NOPROBES		{{0x0, 0x0}}
119 
120 /* USB */
121 #define CONFIG_MUSB_UDC			1
122 #define CONFIG_USB_OMAP3		1
123 #define CONFIG_TWL4030_USB		1
124 
125 /* USB device configuration */
126 #define CONFIG_USB_DEVICE		1
127 #define CONFIG_USB_TTY			1
128 #define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
129 
130 /* USB EHCI */
131 #define CONFIG_CMD_USB
132 #define CONFIG_USB_EHCI
133 
134 #define CONFIG_USB_EHCI_OMAP
135 /*#define CONFIG_EHCI_DCACHE*/ /* leave it disabled for now */
136 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	147
137 
138 #define CONFIG_USB_ULPI
139 #define CONFIG_USB_ULPI_VIEWPORT_OMAP
140 
141 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
142 #define CONFIG_USB_HOST_ETHER
143 #define CONFIG_USB_ETHER_SMSC95XX
144 #define CONFIG_USB_ETHER_ASIX
145 
146 
147 /* commands to include */
148 #include <config_cmd_default.h>
149 
150 #define CONFIG_CMD_ASKENV
151 
152 #define CONFIG_CMD_CACHE
153 #define CONFIG_CMD_EXT2		/* EXT2 Support			*/
154 #define CONFIG_CMD_FAT		/* FAT support			*/
155 #define CONFIG_CMD_JFFS2	/* JFFS2 Support		*/
156 #define CONFIG_CMD_MTDPARTS	/* Enable MTD parts commands */
157 #define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
158 #define MTDIDS_DEFAULT			"nand0=nand"
159 #define MTDPARTS_DEFAULT		"mtdparts=nand:512k(x-loader),"\
160 					"1920k(u-boot),128k(u-boot-env),"\
161 					"4m(kernel),-(fs)"
162 
163 #define CONFIG_CMD_I2C		/* I2C serial bus support	*/
164 #define CONFIG_CMD_MMC		/* MMC support			*/
165 #define CONFIG_USB_STORAGE	/* USB storage support		*/
166 #define CONFIG_CMD_NAND		/* NAND support			*/
167 #define CONFIG_CMD_LED		/* LED support			*/
168 #define CONFIG_CMD_NET      /* bootp, tftpboot, rarpboot    */
169 #define CONFIG_CMD_NFS      /* NFS support          */
170 #define CONFIG_CMD_PING
171 #define CONFIG_CMD_DHCP
172 #define CONFIG_CMD_SETEXPR	/* Evaluate expressions		*/
173 #define CONFIG_CMD_GPIO     /* Enable gpio command */
174 
175 #undef CONFIG_CMD_FLASH		/* flinfo, erase, protect	*/
176 #undef CONFIG_CMD_FPGA		/* FPGA configuration Support	*/
177 #undef CONFIG_CMD_IMI		/* iminfo			*/
178 #undef CONFIG_CMD_IMLS		/* List all found images	*/
179 
180 #define CONFIG_SYS_NO_FLASH
181 #define CONFIG_HARD_I2C			1
182 #define CONFIG_SYS_I2C_SPEED		100000
183 #define CONFIG_SYS_I2C_SLAVE		1
184 #define CONFIG_SYS_I2C_BUS		0
185 #define CONFIG_SYS_I2C_BUS_SELECT	1
186 #define CONFIG_I2C_MULTI_BUS		1
187 #define CONFIG_DRIVER_OMAP34XX_I2C	1
188 #define CONFIG_VIDEO_OMAP3	/* DSS Support			*/
189 
190 /*
191  * TWL4030
192  */
193 #define CONFIG_TWL4030_POWER		1
194 #define CONFIG_TWL4030_LED		1
195 
196 /*
197  * Board NAND Info.
198  */
199 #define CONFIG_SYS_NAND_QUIET_TEST	1
200 #define CONFIG_NAND_OMAP_GPMC
201 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
202 							/* to access nand */
203 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
204 							/* to access nand at */
205 							/* CS0 */
206 #define GPMC_NAND_ECC_LP_x16_LAYOUT	1
207 
208 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
209 							/* devices */
210 #define CONFIG_JFFS2_NAND
211 /* nand device jffs2 lives on */
212 #define CONFIG_JFFS2_DEV		"nand0"
213 /* start of jffs2 partition */
214 #define CONFIG_JFFS2_PART_OFFSET	0x680000
215 #define CONFIG_JFFS2_PART_SIZE		0xf980000	/* size of jffs2 */
216 							/* partition */
217 
218 /* Environment information */
219 #define CONFIG_BOOTDELAY		3
220 
221 #define CONFIG_EXTRA_ENV_SETTINGS \
222 	"loadaddr=0x80200000\0" \
223 	"rdaddr=0x81000000\0" \
224 	"usbtty=cdc_acm\0" \
225 	"bootfile=uImage.beagle\0" \
226 	"console=ttyO2,115200n8\0" \
227 	"mpurate=auto\0" \
228 	"buddy=none\0" \
229 	"optargs=\0" \
230 	"camera=none\0" \
231 	"vram=12M\0" \
232 	"dvimode=640x480MR-16@60\0" \
233 	"defaultdisplay=dvi\0" \
234 	"mmcdev=0\0" \
235 	"mmcroot=/dev/mmcblk0p2 rw\0" \
236 	"mmcrootfstype=ext3 rootwait\0" \
237 	"nandroot=ubi0:rootfs ubi.mtd=4\0" \
238 	"nandrootfstype=ubifs\0" \
239 	"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \
240 	"ramrootfstype=ext2\0" \
241 	"mmcargs=setenv bootargs console=${console} " \
242 		"${optargs} " \
243 		"mpurate=${mpurate} " \
244 		"buddy=${buddy} "\
245 		"camera=${camera} "\
246 		"vram=${vram} " \
247 		"omapfb.mode=dvi:${dvimode} " \
248 		"omapdss.def_disp=${defaultdisplay} " \
249 		"root=${mmcroot} " \
250 		"rootfstype=${mmcrootfstype}\0" \
251 	"nandargs=setenv bootargs console=${console} " \
252 		"${optargs} " \
253 		"mpurate=${mpurate} " \
254 		"buddy=${buddy} "\
255 		"camera=${camera} "\
256 		"vram=${vram} " \
257 		"omapfb.mode=dvi:${dvimode} " \
258 		"omapdss.def_disp=${defaultdisplay} " \
259 		"root=${nandroot} " \
260 		"rootfstype=${nandrootfstype}\0" \
261 	"bootenv=uEnv.txt\0" \
262 	"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
263 	"importbootenv=echo Importing environment from mmc ...; " \
264 		"env import -t $loadaddr $filesize\0" \
265 	"ramargs=setenv bootargs console=${console} " \
266 		"${optargs} " \
267 		"mpurate=${mpurate} " \
268 		"buddy=${buddy} "\
269 		"vram=${vram} " \
270 		"omapfb.mode=dvi:${dvimode} " \
271 		"omapdss.def_disp=${defaultdisplay} " \
272 		"root=${ramroot} " \
273 		"rootfstype=${ramrootfstype}\0" \
274 	"loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
275 	"loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
276 	"loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} /boot/uImage\0" \
277 	"mmcboot=echo Booting from mmc ...; " \
278 		"run mmcargs; " \
279 		"bootm ${loadaddr}\0" \
280 	"nandboot=echo Booting from nand ...; " \
281 		"run nandargs; " \
282 		"nand read ${loadaddr} 280000 400000; " \
283 		"bootm ${loadaddr}\0" \
284 	"ramboot=echo Booting from ramdisk ...; " \
285 		"run ramargs; " \
286 		"bootm ${loadaddr}\0" \
287 	"userbutton=if gpio input 173; then run userbutton_xm; " \
288 		"else run userbutton_nonxm; fi;\0" \
289 	"userbutton_xm=gpio input 4;\0" \
290 	"userbutton_nonxm=gpio input 7;\0"
291 /* "run userbutton" will return 1 (false) if is pressed and 0 (false) if not */
292 #define CONFIG_BOOTCOMMAND \
293 	"if mmc rescan ${mmcdev}; then " \
294 		"if run userbutton; then " \
295 			"setenv bootenv uEnv.txt;" \
296 		"else " \
297 			"setenv bootenv user.txt;" \
298 		"fi;" \
299 		"echo SD/MMC found on device ${mmcdev};" \
300 		"if run loadbootenv; then " \
301 			"echo Loaded environment from ${bootenv};" \
302 			"run importbootenv;" \
303 		"fi;" \
304 		"if test -n $uenvcmd; then " \
305 			"echo Running uenvcmd ...;" \
306 			"run uenvcmd;" \
307 		"fi;" \
308 		"if run loaduimage; then " \
309 			"run mmcboot;" \
310 		"fi;" \
311 	"fi;" \
312 	"run nandboot;" \
313 
314 #define CONFIG_AUTO_COMPLETE		1
315 /*
316  * Miscellaneous configurable options
317  */
318 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
319 #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
320 #define CONFIG_SYS_PROMPT		"OMAP3 beagleboard.org # "
321 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
322 /* Print Buffer Size */
323 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
324 					sizeof(CONFIG_SYS_PROMPT) + 16)
325 #define CONFIG_SYS_MAXARGS		32	/* max number of command args */
326 /* Boot Argument Buffer Size */
327 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
328 
329 #define CONFIG_SYS_ALT_MEMTEST		1
330 #define CONFIG_SYS_MEMTEST_START	(0x82000000)		/* memtest */
331 								/* defaults */
332 #define CONFIG_SYS_MEMTEST_END		(0x87FFFFFF) 		/* 128MB */
333 #define CONFIG_SYS_MEMTEST_SCRATCH	(0x81000000)	/* dummy address */
334 
335 #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0)	/* default */
336 							/* load address */
337 
338 /*
339  * OMAP3 has 12 GP timers, they can be driven by the system clock
340  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
341  * This rate is divided by a local divisor.
342  */
343 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
344 #define CONFIG_SYS_PTV			2       /* Divisor: 2^(PTV+1) => 8 */
345 #define CONFIG_SYS_HZ			1000
346 
347 /*-----------------------------------------------------------------------
348  * Stack sizes
349  *
350  * The stack sizes are set up in start.S using the settings below
351  */
352 #define CONFIG_STACKSIZE	(128 << 10)	/* regular stack 128 KiB */
353 
354 /*-----------------------------------------------------------------------
355  * Physical Memory Map
356  */
357 #define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
358 #define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
359 #define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1
360 
361 /*-----------------------------------------------------------------------
362  * FLASH and environment organization
363  */
364 
365 /* **** PISMO SUPPORT *** */
366 
367 /* Configure the PISMO */
368 #define PISMO1_NAND_SIZE		GPMC_SIZE_128M
369 #define PISMO1_ONEN_SIZE		GPMC_SIZE_128M
370 
371 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
372 
373 #if defined(CONFIG_CMD_NAND)
374 #define CONFIG_SYS_FLASH_BASE		PISMO1_NAND_BASE
375 #endif
376 
377 /* Monitor at start of flash */
378 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
379 #define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
380 
381 #define CONFIG_ENV_IS_IN_NAND		1
382 #define ONENAND_ENV_OFFSET		0x260000 /* environment starts here */
383 #define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
384 
385 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
386 #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
387 #define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET
388 
389 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
390 #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
391 #define CONFIG_SYS_INIT_RAM_SIZE	0x800
392 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
393 					 CONFIG_SYS_INIT_RAM_SIZE - \
394 					 GENERATED_GBL_DATA_SIZE)
395 
396 #define CONFIG_OMAP3_SPI
397 
398 #define CONFIG_SYS_CACHELINE_SIZE	64
399 
400 /* Defines for SPL */
401 #define CONFIG_SPL
402 #define CONFIG_SPL_NAND_SIMPLE
403 #define CONFIG_SPL_TEXT_BASE		0x40200800
404 #define CONFIG_SPL_MAX_SIZE		(54 * 1024)	/* 8 KB for stack */
405 #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
406 
407 #define CONFIG_SPL_BSS_START_ADDR	0x80000000
408 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
409 
410 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
411 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
412 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION	1
413 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"
414 
415 #define CONFIG_SPL_BOARD_INIT
416 #define CONFIG_SPL_LIBCOMMON_SUPPORT
417 #define CONFIG_SPL_LIBDISK_SUPPORT
418 #define CONFIG_SPL_I2C_SUPPORT
419 #define CONFIG_SPL_LIBGENERIC_SUPPORT
420 #define CONFIG_SPL_MMC_SUPPORT
421 #define CONFIG_SPL_FAT_SUPPORT
422 #define CONFIG_SPL_SERIAL_SUPPORT
423 #define CONFIG_SPL_NAND_SUPPORT
424 #define CONFIG_SPL_GPIO_SUPPORT
425 #define CONFIG_SPL_POWER_SUPPORT
426 #define CONFIG_SPL_OMAP3_ID_NAND
427 #define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
428 
429 /* NAND boot config */
430 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
431 #define CONFIG_SYS_NAND_PAGE_COUNT	64
432 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
433 #define CONFIG_SYS_NAND_OOBSIZE		64
434 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
435 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
436 #define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9,\
437 						10, 11, 12, 13}
438 #define CONFIG_SYS_NAND_ECCSIZE		512
439 #define CONFIG_SYS_NAND_ECCBYTES	3
440 #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
441 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
442 
443 /*
444  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
445  * 64 bytes before this address should be set aside for u-boot.img's
446  * header. That is 0x800FFFC0--0x80100000 should not be used for any
447  * other needs.
448  */
449 #define CONFIG_SYS_TEXT_BASE		0x80100000
450 #define CONFIG_SYS_SPL_MALLOC_START	0x80208000
451 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
452 
453 #endif /* __CONFIG_H */
454