1 /* 2 * (C) Copyright 2006-2008 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com> 6 * 7 * Configuration settings for the TI OMAP3530 Beagle board. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __CONFIG_H 13 #define __CONFIG_H 14 15 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 16 17 /* 18 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 19 * 64 bytes before this address should be set aside for u-boot.img's 20 * header. That is 0x800FFFC0--0x80100000 should not be used for any 21 * other needs. We use this rather than the inherited defines from 22 * ti_armv7_common.h for backwards compatibility. 23 */ 24 #define CONFIG_SYS_TEXT_BASE 0x80100000 25 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 26 #define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */ 27 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 28 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 29 30 #include <configs/ti_omap3_common.h> 31 32 /* 33 * Display CPU and Board information 34 */ 35 #define CONFIG_DISPLAY_CPUINFO 1 36 #define CONFIG_DISPLAY_BOARDINFO 1 37 38 #define CONFIG_MISC_INIT_R 39 40 #define CONFIG_REVISION_TAG 1 41 #define CONFIG_ENV_OVERWRITE 42 43 /* Status LED */ 44 #define CONFIG_STATUS_LED 1 45 #define CONFIG_BOARD_SPECIFIC_LED 1 46 #define STATUS_LED_BIT 0x01 47 #define STATUS_LED_STATE STATUS_LED_ON 48 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 49 #define STATUS_LED_BIT1 0x02 50 #define STATUS_LED_STATE1 STATUS_LED_ON 51 #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) 52 #define STATUS_LED_BOOT STATUS_LED_BIT 53 #define STATUS_LED_GREEN STATUS_LED_BIT1 54 55 /* Enable Multi Bus support for I2C */ 56 #define CONFIG_I2C_MULTI_BUS 1 57 58 /* Probe all devices */ 59 #define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}} 60 61 /* USB */ 62 #define CONFIG_MUSB_GADGET 63 #define CONFIG_USB_MUSB_OMAP2PLUS 64 #define CONFIG_MUSB_PIO_ONLY 65 #define CONFIG_USB_GADGET_DUALSPEED 66 #define CONFIG_TWL4030_USB 1 67 #define CONFIG_USB_ETHER 68 #define CONFIG_USB_ETHER_RNDIS 69 #define CONFIG_USB_GADGET 70 #define CONFIG_USB_GADGET_VBUS_DRAW 0 71 #define CONFIG_USBDOWNLOAD_GADGET 72 #define CONFIG_G_DNL_VENDOR_NUM 0x0451 73 #define CONFIG_G_DNL_PRODUCT_NUM 0xd022 74 #define CONFIG_G_DNL_MANUFACTURER "TI" 75 #define CONFIG_CMD_FASTBOOT 76 #define CONFIG_ANDROID_BOOT_IMAGE 77 #define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR 78 #define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 79 80 /* USB EHCI */ 81 #define CONFIG_CMD_USB 82 #define CONFIG_USB_EHCI 83 84 #define CONFIG_USB_EHCI_OMAP 85 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147 86 87 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 88 #define CONFIG_USB_HOST_ETHER 89 #define CONFIG_USB_ETHER_ASIX 90 #define CONFIG_USB_ETHER_MCS7830 91 #define CONFIG_USB_ETHER_SMSC95XX 92 93 /* GPIO banks */ 94 #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */ 95 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */ 96 97 /* commands to include */ 98 #include <config_cmd_default.h> 99 100 #define CONFIG_CMD_ASKENV 101 102 #define CONFIG_CMD_CACHE 103 104 #define MTDIDS_DEFAULT "nand0=nand" 105 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 106 "1920k(u-boot),128k(u-boot-env),"\ 107 "4m(kernel),-(fs)" 108 109 #define CONFIG_USB_STORAGE /* USB storage support */ 110 #define CONFIG_CMD_NAND /* NAND support */ 111 #define CONFIG_CMD_LED /* LED support */ 112 #define CONFIG_CMD_SETEXPR /* Evaluate expressions */ 113 #define CONFIG_CMD_GPIO /* Enable gpio command */ 114 #define CONFIG_CMD_DHCP 115 116 #define CONFIG_VIDEO_OMAP3 /* DSS Support */ 117 118 /* 119 * TWL4030 120 */ 121 #define CONFIG_TWL4030_LED 1 122 123 /* 124 * Board NAND Info. 125 */ 126 #define CONFIG_SYS_NAND_QUIET_TEST 1 127 #define CONFIG_NAND_OMAP_GPMC 128 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 129 /* devices */ 130 131 #define CONFIG_EXTRA_ENV_SETTINGS \ 132 "loadaddr=0x80200000\0" \ 133 "rdaddr=0x81000000\0" \ 134 "fdt_high=0xffffffff\0" \ 135 "fdtaddr=0x80f80000\0" \ 136 "usbtty=cdc_acm\0" \ 137 "bootfile=uImage\0" \ 138 "ramdisk=ramdisk.gz\0" \ 139 "bootdir=/boot\0" \ 140 "bootpart=0:2\0" \ 141 "console=ttyO2,115200n8\0" \ 142 "mpurate=auto\0" \ 143 "buddy=none\0" \ 144 "optargs=\0" \ 145 "camera=none\0" \ 146 "vram=12M\0" \ 147 "dvimode=640x480MR-16@60\0" \ 148 "defaultdisplay=dvi\0" \ 149 "mmcdev=0\0" \ 150 "mmcroot=/dev/mmcblk0p2 rw\0" \ 151 "mmcrootfstype=ext3 rootwait\0" \ 152 "nandroot=ubi0:rootfs ubi.mtd=4\0" \ 153 "nandrootfstype=ubifs\0" \ 154 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \ 155 "ramrootfstype=ext2\0" \ 156 "mmcargs=setenv bootargs console=${console} " \ 157 "${optargs} " \ 158 "mpurate=${mpurate} " \ 159 "buddy=${buddy} "\ 160 "camera=${camera} "\ 161 "vram=${vram} " \ 162 "omapfb.mode=dvi:${dvimode} " \ 163 "omapdss.def_disp=${defaultdisplay} " \ 164 "root=${mmcroot} " \ 165 "rootfstype=${mmcrootfstype}\0" \ 166 "nandargs=setenv bootargs console=${console} " \ 167 "${optargs} " \ 168 "mpurate=${mpurate} " \ 169 "buddy=${buddy} "\ 170 "camera=${camera} "\ 171 "vram=${vram} " \ 172 "omapfb.mode=dvi:${dvimode} " \ 173 "omapdss.def_disp=${defaultdisplay} " \ 174 "root=${nandroot} " \ 175 "rootfstype=${nandrootfstype}\0" \ 176 "findfdt=" \ 177 "if test $beaglerev = AxBx; then " \ 178 "setenv fdtfile omap3-beagle.dtb; fi; " \ 179 "if test $beaglerev = Cx; then " \ 180 "setenv fdtfile omap3-beagle.dtb; fi; " \ 181 "if test $beaglerev = C4; then " \ 182 "setenv fdtfile omap3-beagle.dtb; fi; " \ 183 "if test $beaglerev = xMAB; then " \ 184 "setenv fdtfile omap3-beagle-xm-ab.dtb; fi; " \ 185 "if test $beaglerev = xMC; then " \ 186 "setenv fdtfile omap3-beagle-xm.dtb; fi; " \ 187 "if test $fdtfile = undefined; then " \ 188 "echo WARNING: Could not determine device tree to use; fi; \0" \ 189 "validatefdt=" \ 190 "if test $beaglerev = xMAB; then " \ 191 "if test ! -e mmc ${bootpart} ${bootdir}/${fdtfile}; then " \ 192 "setenv fdtfile omap3-beagle-xm.dtb; " \ 193 "fi; " \ 194 "fi; \0" \ 195 "bootenv=uEnv.txt\0" \ 196 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ 197 "importbootenv=echo Importing environment from mmc ...; " \ 198 "env import -t -r $loadaddr $filesize\0" \ 199 "ramargs=setenv bootargs console=${console} " \ 200 "${optargs} " \ 201 "mpurate=${mpurate} " \ 202 "buddy=${buddy} "\ 203 "vram=${vram} " \ 204 "omapfb.mode=dvi:${dvimode} " \ 205 "omapdss.def_disp=${defaultdisplay} " \ 206 "root=${ramroot} " \ 207 "rootfstype=${ramrootfstype}\0" \ 208 "loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \ 209 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ 210 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 211 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ 212 "source ${loadaddr}\0" \ 213 "loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ 214 "mmcboot=echo Booting from mmc ...; " \ 215 "run mmcargs; " \ 216 "bootm ${loadaddr}\0" \ 217 "mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \ 218 "run mmcargs; " \ 219 "bootz ${loadaddr} - ${fdtaddr}\0" \ 220 "nandboot=echo Booting from nand ...; " \ 221 "run nandargs; " \ 222 "nand read ${loadaddr} 280000 400000; " \ 223 "bootm ${loadaddr}\0" \ 224 "ramboot=echo Booting from ramdisk ...; " \ 225 "run ramargs; " \ 226 "bootm ${loadaddr}\0" \ 227 "userbutton=if gpio input 173; then run userbutton_xm; " \ 228 "else run userbutton_nonxm; fi;\0" \ 229 "userbutton_xm=gpio input 4;\0" \ 230 "userbutton_nonxm=gpio input 7;\0" 231 /* "run userbutton" will return 1 (false) if pressed and 0 (true) if not */ 232 #define CONFIG_BOOTCOMMAND \ 233 "run findfdt; " \ 234 "mmc dev ${mmcdev}; if mmc rescan; then " \ 235 "if run userbutton; then " \ 236 "setenv bootenv uEnv.txt;" \ 237 "else " \ 238 "setenv bootenv user.txt;" \ 239 "fi;" \ 240 "echo SD/MMC found on device ${mmcdev};" \ 241 "if run loadbootenv; then " \ 242 "echo Loaded environment from ${bootenv};" \ 243 "run importbootenv;" \ 244 "fi;" \ 245 "if test -n $uenvcmd; then " \ 246 "echo Running uenvcmd ...;" \ 247 "run uenvcmd;" \ 248 "fi;" \ 249 "if run loadbootscript; then " \ 250 "run bootscript; " \ 251 "else " \ 252 "if run loadimage; then " \ 253 "run mmcboot;" \ 254 "fi;" \ 255 "fi; " \ 256 "fi;" \ 257 "run nandboot;" \ 258 "setenv bootfile zImage;" \ 259 "if run loadimage; then " \ 260 "run loadfdt;" \ 261 "run mmcbootz; " \ 262 "fi; " \ 263 264 /* 265 * OMAP3 has 12 GP timers, they can be driven by the system clock 266 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 267 * This rate is divided by a local divisor. 268 */ 269 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 270 271 /*----------------------------------------------------------------------- 272 * FLASH and environment organization 273 */ 274 275 /* **** PISMO SUPPORT *** */ 276 #if defined(CONFIG_CMD_NAND) 277 #define CONFIG_SYS_FLASH_BASE NAND_BASE 278 #endif 279 280 /* Monitor at start of flash */ 281 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 282 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 283 284 #define CONFIG_ENV_IS_IN_NAND 1 285 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 286 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ 287 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 288 289 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 290 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 291 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 292 293 #define CONFIG_OMAP3_SPI 294 295 #define CONFIG_SYS_CACHELINE_SIZE 64 296 297 /* Defines for SPL */ 298 #define CONFIG_SPL_OMAP3_ID_NAND 299 300 /* NAND boot config */ 301 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16 302 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 303 #define CONFIG_SYS_NAND_PAGE_COUNT 64 304 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 305 #define CONFIG_SYS_NAND_OOBSIZE 64 306 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 307 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 308 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 309 10, 11, 12, 13} 310 #define CONFIG_SYS_NAND_ECCSIZE 512 311 #define CONFIG_SYS_NAND_ECCBYTES 3 312 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 313 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 314 /* NAND: SPL falcon mode configs */ 315 #ifdef CONFIG_SPL_OS_BOOT 316 #define CONFIG_CMD_SPL_NAND_OFS 0x240000 317 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 318 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 319 #endif 320 321 #endif /* __CONFIG_H */ 322