1 /* 2 * (C) Copyright 2006-2008 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com> 6 * 7 * Configuration settings for the TI OMAP3530 Beagle board. 8 * 9 * See file CREDITS for list of people who contributed to this 10 * project. 11 * 12 * This program is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License as 14 * published by the Free Software Foundation; either version 2 of 15 * the License, or (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 25 * MA 02111-1307 USA 26 */ 27 28 #ifndef __CONFIG_H 29 #define __CONFIG_H 30 31 /* 32 * High Level Configuration Options 33 */ 34 #define CONFIG_OMAP 1 /* in a TI OMAP core */ 35 #define CONFIG_OMAP34XX 1 /* which is a 34XX */ 36 #define CONFIG_OMAP3_BEAGLE 1 /* working with BEAGLE */ 37 38 #define CONFIG_SDRC /* The chip has SDRC controller */ 39 40 #include <asm/arch/cpu.h> /* get chip and board defs */ 41 #include <asm/arch/omap3.h> 42 43 /* 44 * Display CPU and Board information 45 */ 46 #define CONFIG_DISPLAY_CPUINFO 1 47 #define CONFIG_DISPLAY_BOARDINFO 1 48 49 /* Clock Defines */ 50 #define V_OSCK 26000000 /* Clock output from T2 */ 51 #define V_SCLK (V_OSCK >> 1) 52 53 #undef CONFIG_USE_IRQ /* no support for IRQs */ 54 #define CONFIG_MISC_INIT_R 55 56 #define CONFIG_OF_LIBFDT 1 57 58 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 59 #define CONFIG_SETUP_MEMORY_TAGS 1 60 #define CONFIG_INITRD_TAG 1 61 #define CONFIG_REVISION_TAG 1 62 63 /* 64 * Size of malloc() pool 65 */ 66 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 67 /* Sector */ 68 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 69 70 /* 71 * Hardware drivers 72 */ 73 74 /* 75 * NS16550 Configuration 76 */ 77 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 78 79 #define CONFIG_SYS_NS16550 80 #define CONFIG_SYS_NS16550_SERIAL 81 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 82 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 83 84 /* 85 * select serial console configuration 86 */ 87 #define CONFIG_CONS_INDEX 3 88 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 89 #define CONFIG_SERIAL3 3 /* UART3 on Beagle Rev 2 */ 90 91 /* allow to overwrite serial and ethaddr */ 92 #define CONFIG_ENV_OVERWRITE 93 #define CONFIG_BAUDRATE 115200 94 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 95 115200} 96 #define CONFIG_GENERIC_MMC 1 97 #define CONFIG_MMC 1 98 #define CONFIG_OMAP_HSMMC 1 99 #define CONFIG_DOS_PARTITION 1 100 101 /* Status LED */ 102 #define CONFIG_STATUS_LED 1 103 #define CONFIG_BOARD_SPECIFIC_LED 1 104 #define STATUS_LED_BIT 0x01 105 #define STATUS_LED_STATE STATUS_LED_ON 106 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 107 #define STATUS_LED_BIT1 0x02 108 #define STATUS_LED_STATE1 STATUS_LED_ON 109 #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) 110 #define STATUS_LED_BOOT STATUS_LED_BIT 111 #define STATUS_LED_GREEN STATUS_LED_BIT1 112 113 /* Enable Multi Bus support for I2C */ 114 #define CONFIG_I2C_MULTI_BUS 1 115 116 /* Probe all devices */ 117 #define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}} 118 119 /* USB */ 120 #define CONFIG_MUSB_UDC 1 121 #define CONFIG_USB_OMAP3 1 122 #define CONFIG_TWL4030_USB 1 123 124 /* USB device configuration */ 125 #define CONFIG_USB_DEVICE 1 126 #define CONFIG_USB_TTY 1 127 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 128 129 /* USB EHCI */ 130 #define CONFIG_CMD_USB 131 #define CONFIG_USB_EHCI 132 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 133 #define CONFIG_USB_HOST_ETHER 134 #define CONFIG_USB_ETHER_SMSC95XX 135 #define CONFIG_USB_ETHER_ASIX 136 137 138 /* commands to include */ 139 #include <config_cmd_default.h> 140 141 #define CONFIG_CMD_CACHE 142 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 143 #define CONFIG_CMD_FAT /* FAT support */ 144 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ 145 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 146 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 147 #define MTDIDS_DEFAULT "nand0=nand" 148 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 149 "1920k(u-boot),128k(u-boot-env),"\ 150 "4m(kernel),-(fs)" 151 152 #define CONFIG_CMD_I2C /* I2C serial bus support */ 153 #define CONFIG_CMD_MMC /* MMC support */ 154 #define CONFIG_USB_STORAGE /* USB storage support */ 155 #define CONFIG_CMD_NAND /* NAND support */ 156 #define CONFIG_CMD_LED /* LED support */ 157 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ 158 #define CONFIG_CMD_NFS /* NFS support */ 159 #define CONFIG_CMD_PING 160 #define CONFIG_CMD_DHCP 161 #define CONFIG_CMD_SETEXPR /* Evaluate expressions */ 162 163 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 164 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 165 #undef CONFIG_CMD_IMI /* iminfo */ 166 #undef CONFIG_CMD_IMLS /* List all found images */ 167 168 #define CONFIG_SYS_NO_FLASH 169 #define CONFIG_HARD_I2C 1 170 #define CONFIG_SYS_I2C_SPEED 100000 171 #define CONFIG_SYS_I2C_SLAVE 1 172 #define CONFIG_SYS_I2C_BUS 0 173 #define CONFIG_SYS_I2C_BUS_SELECT 1 174 #define CONFIG_I2C_MULTI_BUS 1 175 #define CONFIG_DRIVER_OMAP34XX_I2C 1 176 #define CONFIG_VIDEO_OMAP3 /* DSS Support */ 177 178 /* 179 * TWL4030 180 */ 181 #define CONFIG_TWL4030_POWER 1 182 #define CONFIG_TWL4030_LED 1 183 184 /* 185 * Board NAND Info. 186 */ 187 #define CONFIG_SYS_NAND_QUIET_TEST 1 188 #define CONFIG_NAND_OMAP_GPMC 189 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 190 /* to access nand */ 191 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 192 /* to access nand at */ 193 /* CS0 */ 194 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 195 196 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 197 /* devices */ 198 #define CONFIG_JFFS2_NAND 199 /* nand device jffs2 lives on */ 200 #define CONFIG_JFFS2_DEV "nand0" 201 /* start of jffs2 partition */ 202 #define CONFIG_JFFS2_PART_OFFSET 0x680000 203 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ 204 /* partition */ 205 206 /* Environment information */ 207 #define CONFIG_BOOTDELAY 2 208 209 #define CONFIG_EXTRA_ENV_SETTINGS \ 210 "loadaddr=0x80200000\0" \ 211 "rdaddr=0x81000000\0" \ 212 "usbtty=cdc_acm\0" \ 213 "bootfile=uImage.beagle\0" \ 214 "console=ttyO2,115200n8\0" \ 215 "mpurate=auto\0" \ 216 "buddy=none "\ 217 "optargs=\0" \ 218 "camera=none\0" \ 219 "vram=12M\0" \ 220 "dvimode=640x480MR-16@60\0" \ 221 "defaultdisplay=dvi\0" \ 222 "mmcdev=0\0" \ 223 "mmcroot=/dev/mmcblk0p2 rw\0" \ 224 "mmcrootfstype=ext3 rootwait\0" \ 225 "nandroot=ubi0:rootfs ubi.mtd=4\0" \ 226 "nandrootfstype=ubifs\0" \ 227 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \ 228 "ramrootfstype=ext2\0" \ 229 "mmcargs=setenv bootargs console=${console} " \ 230 "${optargs} " \ 231 "mpurate=${mpurate} " \ 232 "buddy=${buddy} "\ 233 "camera=${camera} "\ 234 "vram=${vram} " \ 235 "omapfb.mode=dvi:${dvimode} " \ 236 "omapdss.def_disp=${defaultdisplay} " \ 237 "root=${mmcroot} " \ 238 "rootfstype=${mmcrootfstype}\0" \ 239 "nandargs=setenv bootargs console=${console} " \ 240 "${optargs} " \ 241 "mpurate=${mpurate} " \ 242 "buddy=${buddy} "\ 243 "camera=${camera} "\ 244 "vram=${vram} " \ 245 "omapfb.mode=dvi:${dvimode} " \ 246 "omapdss.def_disp=${defaultdisplay} " \ 247 "root=${nandroot} " \ 248 "rootfstype=${nandrootfstype}\0" \ 249 "bootenv=uEnv.txt\0" \ 250 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ 251 "importbootenv=echo Importing environment from mmc ...; " \ 252 "env import -t $loadaddr $filesize\0" \ 253 "ramargs=setenv bootargs console=${console} " \ 254 "${optargs} " \ 255 "mpurate=${mpurate} " \ 256 "buddy=${buddy} "\ 257 "vram=${vram} " \ 258 "omapfb.mode=dvi:${dvimode} " \ 259 "omapdss.def_disp=${defaultdisplay} " \ 260 "root=${ramroot} " \ 261 "rootfstype=${ramrootfstype}\0" \ 262 "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \ 263 "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 264 "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} /boot/uImage\0" \ 265 "mmcboot=echo Booting from mmc ...; " \ 266 "run mmcargs; " \ 267 "bootm ${loadaddr}\0" \ 268 "nandboot=echo Booting from nand ...; " \ 269 "run nandargs; " \ 270 "nand read ${loadaddr} 280000 400000; " \ 271 "bootm ${loadaddr}\0" \ 272 "ramboot=echo Booting from ramdisk ...; " \ 273 "run ramargs; " \ 274 "bootm ${loadaddr}\0" \ 275 276 #define CONFIG_BOOTCOMMAND \ 277 "if mmc rescan ${mmcdev}; then " \ 278 "if userbutton; then " \ 279 "setenv bootenv user.txt;" \ 280 "fi;" \ 281 "echo SD/MMC found on device ${mmcdev};" \ 282 "if run loadbootenv; then " \ 283 "echo Loaded environment from ${bootenv};" \ 284 "run importbootenv;" \ 285 "fi;" \ 286 "if test -n $uenvcmd; then " \ 287 "echo Running uenvcmd ...;" \ 288 "run uenvcmd;" \ 289 "fi;" \ 290 "if run loaduimage; then " \ 291 "run mmcboot;" \ 292 "fi;" \ 293 "fi;" \ 294 "run nandboot;" \ 295 296 #define CONFIG_AUTO_COMPLETE 1 297 /* 298 * Miscellaneous configurable options 299 */ 300 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 301 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 302 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 303 #define CONFIG_SYS_PROMPT "OMAP3 beagleboard.org # " 304 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 305 /* Print Buffer Size */ 306 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 307 sizeof(CONFIG_SYS_PROMPT) + 16) 308 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 309 /* Boot Argument Buffer Size */ 310 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 311 312 #define CONFIG_SYS_ALT_MEMTEST 1 313 #define CONFIG_SYS_MEMTEST_START (0x82000000) /* memtest */ 314 /* defaults */ 315 #define CONFIG_SYS_MEMTEST_END (0x87FFFFFF) /* 128MB */ 316 #define CONFIG_SYS_MEMTEST_SCRATCH (0x81000000) /* dummy address */ 317 318 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ 319 /* load address */ 320 321 /* 322 * OMAP3 has 12 GP timers, they can be driven by the system clock 323 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 324 * This rate is divided by a local divisor. 325 */ 326 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 327 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 328 #define CONFIG_SYS_HZ 1000 329 330 /*----------------------------------------------------------------------- 331 * Stack sizes 332 * 333 * The stack sizes are set up in start.S using the settings below 334 */ 335 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ 336 337 /*----------------------------------------------------------------------- 338 * Physical Memory Map 339 */ 340 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 341 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 342 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 343 344 /*----------------------------------------------------------------------- 345 * FLASH and environment organization 346 */ 347 348 /* **** PISMO SUPPORT *** */ 349 350 /* Configure the PISMO */ 351 #define PISMO1_NAND_SIZE GPMC_SIZE_128M 352 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M 353 354 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 355 356 #if defined(CONFIG_CMD_NAND) 357 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE 358 #endif 359 360 /* Monitor at start of flash */ 361 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 362 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 363 364 #define CONFIG_ENV_IS_IN_NAND 1 365 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ 366 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 367 368 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 369 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 370 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 371 372 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 373 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 374 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 375 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 376 CONFIG_SYS_INIT_RAM_SIZE - \ 377 GENERATED_GBL_DATA_SIZE) 378 379 #define CONFIG_OMAP3_SPI 380 381 #define CONFIG_SYS_CACHELINE_SIZE 64 382 383 /* Defines for SPL */ 384 #define CONFIG_SPL 385 #define CONFIG_SPL_NAND_SIMPLE 386 #define CONFIG_SPL_TEXT_BASE 0x40200800 387 #define CONFIG_SPL_MAX_SIZE (45 * 1024) 388 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 389 390 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 391 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 392 393 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 394 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 395 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 396 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 397 398 #define CONFIG_SPL_LIBCOMMON_SUPPORT 399 #define CONFIG_SPL_LIBDISK_SUPPORT 400 #define CONFIG_SPL_I2C_SUPPORT 401 #define CONFIG_SPL_LIBGENERIC_SUPPORT 402 #define CONFIG_SPL_MMC_SUPPORT 403 #define CONFIG_SPL_FAT_SUPPORT 404 #define CONFIG_SPL_SERIAL_SUPPORT 405 #define CONFIG_SPL_NAND_SUPPORT 406 #define CONFIG_SPL_POWER_SUPPORT 407 #define CONFIG_SPL_OMAP3_ID_NAND 408 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 409 410 /* NAND boot config */ 411 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 412 #define CONFIG_SYS_NAND_PAGE_COUNT 64 413 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 414 #define CONFIG_SYS_NAND_OOBSIZE 64 415 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 416 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 417 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 418 10, 11, 12, 13} 419 #define CONFIG_SYS_NAND_ECCSIZE 512 420 #define CONFIG_SYS_NAND_ECCBYTES 3 421 #define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \ 422 CONFIG_SYS_NAND_ECCSIZE) 423 #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ 424 CONFIG_SYS_NAND_ECCSTEPS) 425 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 426 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 427 428 /* 429 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 430 * 64 bytes before this address should be set aside for u-boot.img's 431 * header. That is 0x800FFFC0--0x80100000 should not be used for any 432 * other needs. 433 */ 434 #define CONFIG_SYS_TEXT_BASE 0x80100000 435 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 436 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 437 438 #endif /* __CONFIG_H */ 439