1 /* 2 * (C) Copyright 2006-2008 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com> 6 * 7 * Configuration settings for the TI OMAP3530 Beagle board. 8 * 9 * See file CREDITS for list of people who contributed to this 10 * project. 11 * 12 * This program is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License as 14 * published by the Free Software Foundation; either version 2 of 15 * the License, or (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 25 * MA 02111-1307 USA 26 */ 27 28 #ifndef __CONFIG_H 29 #define __CONFIG_H 30 31 /* 32 * High Level Configuration Options 33 */ 34 #define CONFIG_OMAP 1 /* in a TI OMAP core */ 35 #define CONFIG_OMAP34XX 1 /* which is a 34XX */ 36 #define CONFIG_OMAP3430 1 /* which is in a 3430 */ 37 #define CONFIG_OMAP3_BEAGLE 1 /* working with BEAGLE */ 38 39 #define CONFIG_SDRC /* The chip has SDRC controller */ 40 41 #include <asm/arch/cpu.h> /* get chip and board defs */ 42 #include <asm/arch/omap3.h> 43 44 /* 45 * Display CPU and Board information 46 */ 47 #define CONFIG_DISPLAY_CPUINFO 1 48 #define CONFIG_DISPLAY_BOARDINFO 1 49 50 /* Clock Defines */ 51 #define V_OSCK 26000000 /* Clock output from T2 */ 52 #define V_SCLK (V_OSCK >> 1) 53 54 #undef CONFIG_USE_IRQ /* no support for IRQs */ 55 #define CONFIG_MISC_INIT_R 56 57 #define CONFIG_OF_LIBFDT 1 58 59 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 60 #define CONFIG_SETUP_MEMORY_TAGS 1 61 #define CONFIG_INITRD_TAG 1 62 #define CONFIG_REVISION_TAG 1 63 64 /* 65 * Size of malloc() pool 66 */ 67 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 68 /* Sector */ 69 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 70 71 /* 72 * Hardware drivers 73 */ 74 75 /* 76 * NS16550 Configuration 77 */ 78 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 79 80 #define CONFIG_SYS_NS16550 81 #define CONFIG_SYS_NS16550_SERIAL 82 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 83 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 84 85 /* 86 * select serial console configuration 87 */ 88 #define CONFIG_CONS_INDEX 3 89 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 90 #define CONFIG_SERIAL3 3 /* UART3 on Beagle Rev 2 */ 91 92 /* allow to overwrite serial and ethaddr */ 93 #define CONFIG_ENV_OVERWRITE 94 #define CONFIG_BAUDRATE 115200 95 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 96 115200} 97 #define CONFIG_GENERIC_MMC 1 98 #define CONFIG_MMC 1 99 #define CONFIG_OMAP_HSMMC 1 100 #define CONFIG_DOS_PARTITION 1 101 102 /* Status LED */ 103 #define CONFIG_STATUS_LED 1 104 #define CONFIG_BOARD_SPECIFIC_LED 1 105 #define STATUS_LED_BIT 0x01 106 #define STATUS_LED_STATE STATUS_LED_ON 107 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 108 #define STATUS_LED_BIT1 0x02 109 #define STATUS_LED_STATE1 STATUS_LED_ON 110 #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) 111 #define STATUS_LED_BOOT STATUS_LED_BIT 112 #define STATUS_LED_GREEN STATUS_LED_BIT1 113 114 /* DDR - I use Micron DDR */ 115 #define CONFIG_OMAP3_MICRON_DDR 1 116 117 /* Enable Multi Bus support for I2C */ 118 #define CONFIG_I2C_MULTI_BUS 1 119 120 /* Probe all devices */ 121 #define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}} 122 123 /* USB */ 124 #define CONFIG_MUSB_UDC 1 125 #define CONFIG_USB_OMAP3 1 126 #define CONFIG_TWL4030_USB 1 127 128 /* USB device configuration */ 129 #define CONFIG_USB_DEVICE 1 130 #define CONFIG_USB_TTY 1 131 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 132 133 /* USB EHCI */ 134 #define CONFIG_CMD_USB 135 #define CONFIG_USB_EHCI 136 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 137 #define CONFIG_USB_HOST_ETHER 138 #define CONFIG_USB_ETHER_SMSC95XX 139 #define CONFIG_USB_ETHER_ASIX 140 141 142 /* commands to include */ 143 #include <config_cmd_default.h> 144 145 #define CONFIG_CMD_CACHE 146 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 147 #define CONFIG_CMD_FAT /* FAT support */ 148 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ 149 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 150 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 151 #define MTDIDS_DEFAULT "nand0=nand" 152 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 153 "1920k(u-boot),128k(u-boot-env),"\ 154 "4m(kernel),-(fs)" 155 156 #define CONFIG_CMD_I2C /* I2C serial bus support */ 157 #define CONFIG_CMD_MMC /* MMC support */ 158 #define CONFIG_USB_STORAGE /* USB storage support */ 159 #define CONFIG_CMD_NAND /* NAND support */ 160 #define CONFIG_CMD_LED /* LED support */ 161 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ 162 #define CONFIG_CMD_NFS /* NFS support */ 163 #define CONFIG_CMD_PING 164 #define CONFIG_CMD_DHCP 165 #define CONFIG_CMD_SETEXPR /* Evaluate expressions */ 166 167 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 168 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 169 #undef CONFIG_CMD_IMI /* iminfo */ 170 #undef CONFIG_CMD_IMLS /* List all found images */ 171 172 #define CONFIG_SYS_NO_FLASH 173 #define CONFIG_HARD_I2C 1 174 #define CONFIG_SYS_I2C_SPEED 100000 175 #define CONFIG_SYS_I2C_SLAVE 1 176 #define CONFIG_SYS_I2C_BUS 0 177 #define CONFIG_SYS_I2C_BUS_SELECT 1 178 #define CONFIG_I2C_MULTI_BUS 1 179 #define CONFIG_DRIVER_OMAP34XX_I2C 1 180 #define CONFIG_VIDEO_OMAP3 /* DSS Support */ 181 182 /* 183 * TWL4030 184 */ 185 #define CONFIG_TWL4030_POWER 1 186 #define CONFIG_TWL4030_LED 1 187 188 /* 189 * Board NAND Info. 190 */ 191 #define CONFIG_SYS_NAND_QUIET_TEST 1 192 #define CONFIG_NAND_OMAP_GPMC 193 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 194 /* to access nand */ 195 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 196 /* to access nand at */ 197 /* CS0 */ 198 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 199 200 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 201 /* devices */ 202 #define CONFIG_JFFS2_NAND 203 /* nand device jffs2 lives on */ 204 #define CONFIG_JFFS2_DEV "nand0" 205 /* start of jffs2 partition */ 206 #define CONFIG_JFFS2_PART_OFFSET 0x680000 207 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ 208 /* partition */ 209 210 /* Environment information */ 211 #define CONFIG_BOOTDELAY 2 212 213 #define CONFIG_EXTRA_ENV_SETTINGS \ 214 "loadaddr=0x80200000\0" \ 215 "rdaddr=0x81000000\0" \ 216 "usbtty=cdc_acm\0" \ 217 "bootfile=uImage.beagle\0" \ 218 "console=ttyS2,115200n8\0" \ 219 "mpurate=auto\0" \ 220 "buddy=none "\ 221 "optargs=\0" \ 222 "camera=none\0" \ 223 "vram=12M\0" \ 224 "dvimode=640x480MR-16@60\0" \ 225 "defaultdisplay=dvi\0" \ 226 "mmcdev=0\0" \ 227 "mmcroot=/dev/mmcblk0p2 rw\0" \ 228 "mmcrootfstype=ext3 rootwait\0" \ 229 "nandroot=ubi0:rootfs ubi.mtd=4\0" \ 230 "nandrootfstype=ubifs\0" \ 231 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \ 232 "ramrootfstype=ext2\0" \ 233 "mmcargs=setenv bootargs console=${console} " \ 234 "${optargs} " \ 235 "mpurate=${mpurate} " \ 236 "buddy=${buddy} "\ 237 "camera=${camera} "\ 238 "vram=${vram} " \ 239 "omapfb.mode=dvi:${dvimode} " \ 240 "omapdss.def_disp=${defaultdisplay} " \ 241 "root=${mmcroot} " \ 242 "rootfstype=${mmcrootfstype}\0" \ 243 "nandargs=setenv bootargs console=${console} " \ 244 "${optargs} " \ 245 "mpurate=${mpurate} " \ 246 "buddy=${buddy} "\ 247 "camera=${camera} "\ 248 "vram=${vram} " \ 249 "omapfb.mode=dvi:${dvimode} " \ 250 "omapdss.def_disp=${defaultdisplay} " \ 251 "root=${nandroot} " \ 252 "rootfstype=${nandrootfstype}\0" \ 253 "bootenv=uEnv.txt\0" \ 254 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ 255 "importbootenv=echo Importing environment from mmc ...; " \ 256 "env import -t $loadaddr $filesize\0" \ 257 "ramargs=setenv bootargs console=${console} " \ 258 "${optargs} " \ 259 "mpurate=${mpurate} " \ 260 "buddy=${buddy} "\ 261 "vram=${vram} " \ 262 "omapfb.mode=dvi:${dvimode} " \ 263 "omapdss.def_disp=${defaultdisplay} " \ 264 "root=${ramroot} " \ 265 "rootfstype=${ramrootfstype}\0" \ 266 "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \ 267 "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 268 "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} /boot/uImage\0" \ 269 "mmcboot=echo Booting from mmc ...; " \ 270 "run mmcargs; " \ 271 "bootm ${loadaddr}\0" \ 272 "nandboot=echo Booting from nand ...; " \ 273 "run nandargs; " \ 274 "nand read ${loadaddr} 280000 400000; " \ 275 "bootm ${loadaddr}\0" \ 276 "ramboot=echo Booting from ramdisk ...; " \ 277 "run ramargs; " \ 278 "bootm ${loadaddr}\0" \ 279 280 #define CONFIG_BOOTCOMMAND \ 281 "if mmc rescan ${mmcdev}; then " \ 282 "if userbutton; then " \ 283 "setenv bootenv user.txt;" \ 284 "fi;" \ 285 "echo SD/MMC found on device ${mmcdev};" \ 286 "if run loadbootenv; then " \ 287 "echo Loaded environment from ${bootenv};" \ 288 "run importbootenv;" \ 289 "fi;" \ 290 "if test -n $uenvcmd; then " \ 291 "echo Running uenvcmd ...;" \ 292 "run uenvcmd;" \ 293 "fi;" \ 294 "if run loaduimage; then " \ 295 "run mmcboot;" \ 296 "fi;" \ 297 "fi;" \ 298 "run nandboot;" \ 299 300 #define CONFIG_AUTO_COMPLETE 1 301 /* 302 * Miscellaneous configurable options 303 */ 304 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 305 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 306 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 307 #define CONFIG_SYS_PROMPT "OMAP3 beagleboard.org # " 308 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 309 /* Print Buffer Size */ 310 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 311 sizeof(CONFIG_SYS_PROMPT) + 16) 312 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 313 /* Boot Argument Buffer Size */ 314 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 315 316 #define CONFIG_SYS_ALT_MEMTEST 1 317 #define CONFIG_SYS_MEMTEST_START (0x82000000) /* memtest */ 318 /* defaults */ 319 #define CONFIG_SYS_MEMTEST_END (0x87FFFFFF) /* 128MB */ 320 #define CONFIG_SYS_MEMTEST_SCRATCH (0x81000000) /* dummy address */ 321 322 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ 323 /* load address */ 324 325 /* 326 * OMAP3 has 12 GP timers, they can be driven by the system clock 327 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 328 * This rate is divided by a local divisor. 329 */ 330 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 331 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 332 #define CONFIG_SYS_HZ 1000 333 334 /*----------------------------------------------------------------------- 335 * Stack sizes 336 * 337 * The stack sizes are set up in start.S using the settings below 338 */ 339 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ 340 #ifdef CONFIG_USE_IRQ 341 #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */ 342 #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */ 343 #endif 344 345 /*----------------------------------------------------------------------- 346 * Physical Memory Map 347 */ 348 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 349 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 350 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */ 351 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 352 353 /* SDRAM Bank Allocation method */ 354 #define SDRC_R_B_C 1 355 356 /*----------------------------------------------------------------------- 357 * FLASH and environment organization 358 */ 359 360 /* **** PISMO SUPPORT *** */ 361 362 /* Configure the PISMO */ 363 #define PISMO1_NAND_SIZE GPMC_SIZE_128M 364 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M 365 366 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 367 368 #if defined(CONFIG_CMD_NAND) 369 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE 370 #endif 371 372 /* Monitor at start of flash */ 373 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 374 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 375 376 #define CONFIG_ENV_IS_IN_NAND 1 377 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ 378 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 379 380 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 381 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 382 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 383 384 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 385 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 386 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 387 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 388 CONFIG_SYS_INIT_RAM_SIZE - \ 389 GENERATED_GBL_DATA_SIZE) 390 391 #define CONFIG_OMAP3_SPI 392 393 #endif /* __CONFIG_H */ 394