xref: /openbmc/u-boot/include/configs/omap3_beagle.h (revision 409f05f259ee5cb3e13b52279ce2365a6f8b8a8b)
1 /*
2  * (C) Copyright 2006-2008
3  * Texas Instruments.
4  * Richard Woodruff <r-woodruff2@ti.com>
5  * Syed Mohammed Khasim <x0khasim@ti.com>
6  *
7  * Configuration settings for the TI OMAP3530 Beagle board.
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  */
11 
12 #ifndef __CONFIG_H
13 #define __CONFIG_H
14 
15 #define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
16 
17 /*
18  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
19  * 64 bytes before this address should be set aside for u-boot.img's
20  * header. That is 0x800FFFC0--0x80100000 should not be used for any
21  * other needs.  We use this rather than the inherited defines from
22  * ti_armv7_common.h for backwards compatibility.
23  */
24 #define CONFIG_SYS_TEXT_BASE		0x80100000
25 #define CONFIG_SPL_BSS_START_ADDR	0x80000000
26 #define CONFIG_SPL_BSS_MAX_SIZE		(512 << 10)	/* 512 KB */
27 #define CONFIG_SYS_SPL_MALLOC_START	0x80208000
28 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
29 
30 #include <configs/ti_omap3_common.h>
31 
32 #define CONFIG_MISC_INIT_R
33 
34 #define CONFIG_REVISION_TAG		1
35 #define CONFIG_ENV_OVERWRITE
36 
37 /* Status LED */
38 
39 /* Enable Multi Bus support for I2C */
40 #define CONFIG_I2C_MULTI_BUS		1
41 
42 /* Probe all devices */
43 #define CONFIG_SYS_I2C_NOPROBES		{{0x0, 0x0}}
44 
45 /* USB */
46 #define CONFIG_USB_MUSB_OMAP2PLUS
47 #define CONFIG_USB_MUSB_PIO_ONLY
48 #define CONFIG_TWL4030_USB		1
49 
50 /* USB EHCI */
51 
52 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	147
53 
54 /* commands to include */
55 
56 #define MTDIDS_DEFAULT			"nand0=nand"
57 #define MTDPARTS_DEFAULT		"mtdparts=nand:512k(x-loader),"\
58 					"1920k(u-boot),128k(u-boot-env),"\
59 					"4m(kernel),-(fs)"
60 
61 #define CONFIG_VIDEO_OMAP3	/* DSS Support			*/
62 
63 /*
64  * TWL4030
65  */
66 #define CONFIG_TWL4030_LED		1
67 
68 /*
69  * Board NAND Info.
70  */
71 #define CONFIG_NAND_OMAP_GPMC
72 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
73 							/* devices */
74 
75 #define BOOT_TARGET_DEVICES(func) \
76 	func(MMC, mmc, 0)
77 
78 #define CONFIG_BOOTCOMMAND \
79 	"run findfdt; " \
80 	"run distro_bootcmd; " \
81 	"mmc dev ${mmcdev}; if mmc rescan; then " \
82 		"if run userbutton; then " \
83 			"setenv bootenv uEnv.txt;" \
84 		"else " \
85 			"setenv bootenv user.txt;" \
86 		"fi;" \
87 		"echo SD/MMC found on device ${mmcdev};" \
88 		"if run loadbootenv; then " \
89 			"echo Loaded environment from ${bootenv};" \
90 			"run importbootenv;" \
91 		"fi;" \
92 		"if test -n $uenvcmd; then " \
93 			"echo Running uenvcmd ...;" \
94 			"run uenvcmd;" \
95 		"fi;" \
96 		"if run loadbootscript; then " \
97 			"run bootscript; " \
98 		"else " \
99 			"if run loadimage; then " \
100 				"run mmcboot;" \
101 			"fi;" \
102 		"fi; " \
103 	"fi;" \
104 	"run nandboot;" \
105 	"setenv bootfile zImage;" \
106 	"if run loadimage; then " \
107 		"run loadfdt;" \
108 		"run mmcbootz; " \
109 	"fi; " \
110 
111 #include <config_distro_bootcmd.h>
112 
113 #define CONFIG_EXTRA_ENV_SETTINGS \
114 	"loadaddr=0x80200000\0" \
115 	"kernel_addr_r=0x80200000\0" \
116 	"rdaddr=0x81000000\0" \
117 	"initrd_addr_r=0x81000000\0" \
118 	"fdt_high=0xffffffff\0" \
119 	"fdtaddr=0x80f80000\0" \
120 	"fdt_addr_r=0x80f80000\0" \
121 	"usbtty=cdc_acm\0" \
122 	"bootfile=uImage\0" \
123 	"ramdisk=ramdisk.gz\0" \
124 	"bootdir=/boot\0" \
125 	"bootpart=0:2\0" \
126 	"console=ttyO2,115200n8\0" \
127 	"mpurate=auto\0" \
128 	"buddy=none\0" \
129 	"optargs=\0" \
130 	"camera=none\0" \
131 	"vram=12M\0" \
132 	"dvimode=640x480MR-16@60\0" \
133 	"defaultdisplay=dvi\0" \
134 	"mmcdev=0\0" \
135 	"mmcroot=/dev/mmcblk0p2 rw\0" \
136 	"mmcrootfstype=ext3 rootwait\0" \
137 	"nandroot=ubi0:rootfs ubi.mtd=4\0" \
138 	"nandrootfstype=ubifs\0" \
139 	"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \
140 	"ramrootfstype=ext2\0" \
141 	"mmcargs=setenv bootargs console=${console} " \
142 		"${optargs} " \
143 		"mpurate=${mpurate} " \
144 		"buddy=${buddy} "\
145 		"camera=${camera} "\
146 		"vram=${vram} " \
147 		"omapfb.mode=dvi:${dvimode} " \
148 		"omapdss.def_disp=${defaultdisplay} " \
149 		"root=${mmcroot} " \
150 		"rootfstype=${mmcrootfstype}\0" \
151 	"nandargs=setenv bootargs console=${console} " \
152 		"${optargs} " \
153 		"mpurate=${mpurate} " \
154 		"buddy=${buddy} "\
155 		"camera=${camera} "\
156 		"vram=${vram} " \
157 		"omapfb.mode=dvi:${dvimode} " \
158 		"omapdss.def_disp=${defaultdisplay} " \
159 		"root=${nandroot} " \
160 		"rootfstype=${nandrootfstype}\0" \
161 	"findfdt=" \
162 		"if test $beaglerev = AxBx; then " \
163 			"setenv fdtfile omap3-beagle.dtb; fi; " \
164 		"if test $beaglerev = Cx; then " \
165 			"setenv fdtfile omap3-beagle.dtb; fi; " \
166 		"if test $beaglerev = C4; then " \
167 			"setenv fdtfile omap3-beagle.dtb; fi; " \
168 		"if test $beaglerev = xMAB; then " \
169 			"setenv fdtfile omap3-beagle-xm-ab.dtb; fi; " \
170 		"if test $beaglerev = xMC; then " \
171 			"setenv fdtfile omap3-beagle-xm.dtb; fi; " \
172 		"if test $fdtfile = undefined; then " \
173 			"echo WARNING: Could not determine device tree to use; fi; \0" \
174 	"validatefdt=" \
175 		"if test $beaglerev = xMAB; then " \
176 			"if test ! -e mmc ${bootpart} ${bootdir}/${fdtfile}; then " \
177 				"setenv fdtfile omap3-beagle-xm.dtb; " \
178 			"fi; " \
179 		"fi; \0" \
180 	"bootenv=uEnv.txt\0" \
181 	"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
182 	"importbootenv=echo Importing environment from mmc ...; " \
183 		"env import -t -r $loadaddr $filesize\0" \
184 	"ramargs=setenv bootargs console=${console} " \
185 		"${optargs} " \
186 		"mpurate=${mpurate} " \
187 		"buddy=${buddy} "\
188 		"vram=${vram} " \
189 		"omapfb.mode=dvi:${dvimode} " \
190 		"omapdss.def_disp=${defaultdisplay} " \
191 		"root=${ramroot} " \
192 		"rootfstype=${ramrootfstype}\0" \
193 	"loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \
194 	"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
195 	"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
196 	"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
197 		"source ${loadaddr}\0" \
198 	"loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
199 	"mmcboot=echo Booting from mmc ...; " \
200 		"run mmcargs; " \
201 		"bootm ${loadaddr}\0" \
202 	"mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \
203 		"run mmcargs; " \
204 		"bootz ${loadaddr} - ${fdtaddr}\0" \
205 	"nandboot=echo Booting from nand ...; " \
206 		"run nandargs; " \
207 		"nand read ${loadaddr} 280000 400000; " \
208 		"bootm ${loadaddr}\0" \
209 	"ramboot=echo Booting from ramdisk ...; " \
210 		"run ramargs; " \
211 		"bootm ${loadaddr}\0" \
212 	"userbutton=if gpio input 173; then run userbutton_xm; " \
213 		"else run userbutton_nonxm; fi;\0" \
214 	"userbutton_xm=gpio input 4;\0" \
215 	"userbutton_nonxm=gpio input 7;\0" \
216 	BOOTENV
217 
218 /*
219  * OMAP3 has 12 GP timers, they can be driven by the system clock
220  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
221  * This rate is divided by a local divisor.
222  */
223 #define CONFIG_SYS_PTV			2       /* Divisor: 2^(PTV+1) => 8 */
224 
225 /*-----------------------------------------------------------------------
226  * FLASH and environment organization
227  */
228 
229 /* **** PISMO SUPPORT *** */
230 #if defined(CONFIG_CMD_NAND)
231 #define CONFIG_SYS_FLASH_BASE		NAND_BASE
232 #endif
233 
234 /* Monitor at start of flash */
235 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
236 #define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
237 
238 #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
239 #define ONENAND_ENV_OFFSET		0x260000 /* environment starts here */
240 
241 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
242 #define CONFIG_ENV_OFFSET		0x260000
243 #define CONFIG_ENV_ADDR			0x260000
244 
245 /* Defines for SPL */
246 
247 /* NAND boot config */
248 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
249 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
250 #define CONFIG_SYS_NAND_PAGE_COUNT	64
251 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
252 #define CONFIG_SYS_NAND_OOBSIZE		64
253 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
254 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
255 #define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9,\
256 						10, 11, 12, 13}
257 #define CONFIG_SYS_NAND_ECCSIZE		512
258 #define CONFIG_SYS_NAND_ECCBYTES	3
259 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_HAM1_CODE_HW
260 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
261 /* NAND: SPL falcon mode configs */
262 #ifdef CONFIG_SPL_OS_BOOT
263 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x280000
264 #endif
265 
266 #endif /* __CONFIG_H */
267