1 /* 2 * (C) Copyright 2006-2008 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com> 6 * 7 * Configuration settings for the TI OMAP3530 Beagle board. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __CONFIG_H 13 #define __CONFIG_H 14 15 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 16 17 /* 18 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 19 * 64 bytes before this address should be set aside for u-boot.img's 20 * header. That is 0x800FFFC0--0x80100000 should not be used for any 21 * other needs. We use this rather than the inherited defines from 22 * ti_armv7_common.h for backwards compatibility. 23 */ 24 #define CONFIG_SYS_TEXT_BASE 0x80100000 25 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 26 #define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */ 27 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 28 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 29 30 #include <configs/ti_omap3_common.h> 31 32 /* 33 * Display CPU and Board information 34 */ 35 #define CONFIG_DISPLAY_CPUINFO 1 36 #define CONFIG_DISPLAY_BOARDINFO 1 37 38 #define CONFIG_MISC_INIT_R 39 40 #define CONFIG_REVISION_TAG 1 41 #define CONFIG_ENV_OVERWRITE 42 43 /* Status LED */ 44 #define CONFIG_STATUS_LED 1 45 #define CONFIG_BOARD_SPECIFIC_LED 1 46 #define STATUS_LED_BIT 0x01 47 #define STATUS_LED_STATE STATUS_LED_ON 48 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 49 #define STATUS_LED_BIT1 0x02 50 #define STATUS_LED_STATE1 STATUS_LED_ON 51 #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) 52 #define STATUS_LED_BOOT STATUS_LED_BIT 53 #define STATUS_LED_GREEN STATUS_LED_BIT1 54 55 /* Enable Multi Bus support for I2C */ 56 #define CONFIG_I2C_MULTI_BUS 1 57 58 /* Probe all devices */ 59 #define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}} 60 61 /* USB */ 62 #define CONFIG_MUSB_GADGET 63 #define CONFIG_USB_MUSB_OMAP2PLUS 64 #define CONFIG_MUSB_PIO_ONLY 65 #define CONFIG_USB_GADGET_DUALSPEED 66 #define CONFIG_TWL4030_USB 1 67 #define CONFIG_USB_ETHER 68 #define CONFIG_USB_ETHER_RNDIS 69 70 /* USB EHCI */ 71 #define CONFIG_CMD_USB 72 #define CONFIG_USB_EHCI 73 74 #define CONFIG_USB_EHCI_OMAP 75 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147 76 77 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 78 #define CONFIG_USB_HOST_ETHER 79 #define CONFIG_USB_ETHER_ASIX 80 #define CONFIG_USB_ETHER_MCS7830 81 #define CONFIG_USB_ETHER_SMSC95XX 82 83 /* GPIO banks */ 84 #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */ 85 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */ 86 87 /* commands to include */ 88 #include <config_cmd_default.h> 89 90 #define CONFIG_CMD_ASKENV 91 92 #define CONFIG_CMD_CACHE 93 94 #define MTDIDS_DEFAULT "nand0=nand" 95 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 96 "1920k(u-boot),128k(u-boot-env),"\ 97 "4m(kernel),-(fs)" 98 99 #define CONFIG_USB_STORAGE /* USB storage support */ 100 #define CONFIG_CMD_NAND /* NAND support */ 101 #define CONFIG_CMD_LED /* LED support */ 102 #define CONFIG_CMD_SETEXPR /* Evaluate expressions */ 103 #define CONFIG_CMD_GPIO /* Enable gpio command */ 104 105 #define CONFIG_VIDEO_OMAP3 /* DSS Support */ 106 107 /* 108 * TWL4030 109 */ 110 #define CONFIG_TWL4030_LED 1 111 112 /* 113 * Board NAND Info. 114 */ 115 #define CONFIG_SYS_NAND_QUIET_TEST 1 116 #define CONFIG_NAND_OMAP_GPMC 117 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 118 /* devices */ 119 120 #define CONFIG_EXTRA_ENV_SETTINGS \ 121 "loadaddr=0x80200000\0" \ 122 "rdaddr=0x81000000\0" \ 123 "fdt_high=0xffffffff\0" \ 124 "fdtaddr=0x80f80000\0" \ 125 "usbtty=cdc_acm\0" \ 126 "bootfile=uImage\0" \ 127 "ramdisk=ramdisk.gz\0" \ 128 "bootdir=/boot\0" \ 129 "bootpart=0:2\0" \ 130 "console=ttyO2,115200n8\0" \ 131 "mpurate=auto\0" \ 132 "buddy=none\0" \ 133 "optargs=\0" \ 134 "camera=none\0" \ 135 "vram=12M\0" \ 136 "dvimode=640x480MR-16@60\0" \ 137 "defaultdisplay=dvi\0" \ 138 "mmcdev=0\0" \ 139 "mmcroot=/dev/mmcblk0p2 rw\0" \ 140 "mmcrootfstype=ext3 rootwait\0" \ 141 "nandroot=ubi0:rootfs ubi.mtd=4\0" \ 142 "nandrootfstype=ubifs\0" \ 143 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \ 144 "ramrootfstype=ext2\0" \ 145 "mmcargs=setenv bootargs console=${console} " \ 146 "${optargs} " \ 147 "mpurate=${mpurate} " \ 148 "buddy=${buddy} "\ 149 "camera=${camera} "\ 150 "vram=${vram} " \ 151 "omapfb.mode=dvi:${dvimode} " \ 152 "omapdss.def_disp=${defaultdisplay} " \ 153 "root=${mmcroot} " \ 154 "rootfstype=${mmcrootfstype}\0" \ 155 "nandargs=setenv bootargs console=${console} " \ 156 "${optargs} " \ 157 "mpurate=${mpurate} " \ 158 "buddy=${buddy} "\ 159 "camera=${camera} "\ 160 "vram=${vram} " \ 161 "omapfb.mode=dvi:${dvimode} " \ 162 "omapdss.def_disp=${defaultdisplay} " \ 163 "root=${nandroot} " \ 164 "rootfstype=${nandrootfstype}\0" \ 165 "findfdt=" \ 166 "if test $beaglerev = AxBx; then " \ 167 "setenv fdtfile omap3-beagle.dtb; fi; " \ 168 "if test $beaglerev = Cx; then " \ 169 "setenv fdtfile omap3-beagle.dtb; fi; " \ 170 "if test $beaglerev = C4; then " \ 171 "setenv fdtfile omap3-beagle.dtb; fi; " \ 172 "if test $beaglerev = xMAB; then " \ 173 "setenv fdtfile omap3-beagle-xm-ab.dtb; fi; " \ 174 "if test $beaglerev = xMC; then " \ 175 "setenv fdtfile omap3-beagle-xm.dtb; fi; " \ 176 "if test $fdtfile = undefined; then " \ 177 "echo WARNING: Could not determine device tree to use; fi; \0" \ 178 "validatefdt=" \ 179 "if test $beaglerev = xMAB; then " \ 180 "if test ! -e mmc ${bootpart} ${bootdir}/${fdtfile}; then " \ 181 "setenv fdtfile omap3-beagle-xm.dtb; " \ 182 "fi; " \ 183 "fi; \0" \ 184 "bootenv=uEnv.txt\0" \ 185 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ 186 "importbootenv=echo Importing environment from mmc ...; " \ 187 "env import -t $loadaddr $filesize\0" \ 188 "ramargs=setenv bootargs console=${console} " \ 189 "${optargs} " \ 190 "mpurate=${mpurate} " \ 191 "buddy=${buddy} "\ 192 "vram=${vram} " \ 193 "omapfb.mode=dvi:${dvimode} " \ 194 "omapdss.def_disp=${defaultdisplay} " \ 195 "root=${ramroot} " \ 196 "rootfstype=${ramrootfstype}\0" \ 197 "loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \ 198 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ 199 "loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ 200 "mmcboot=echo Booting from mmc ...; " \ 201 "run mmcargs; " \ 202 "bootm ${loadaddr}\0" \ 203 "mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \ 204 "run mmcargs; " \ 205 "bootz ${loadaddr} - ${fdtaddr}\0" \ 206 "nandboot=echo Booting from nand ...; " \ 207 "run nandargs; " \ 208 "nand read ${loadaddr} 280000 400000; " \ 209 "bootm ${loadaddr}\0" \ 210 "ramboot=echo Booting from ramdisk ...; " \ 211 "run ramargs; " \ 212 "bootm ${loadaddr}\0" \ 213 "userbutton=if gpio input 173; then run userbutton_xm; " \ 214 "else run userbutton_nonxm; fi;\0" \ 215 "userbutton_xm=gpio input 4;\0" \ 216 "userbutton_nonxm=gpio input 7;\0" 217 /* "run userbutton" will return 1 (false) if pressed and 0 (true) if not */ 218 #define CONFIG_BOOTCOMMAND \ 219 "run findfdt; " \ 220 "mmc dev ${mmcdev}; if mmc rescan; then " \ 221 "if run userbutton; then " \ 222 "setenv bootenv uEnv.txt;" \ 223 "else " \ 224 "setenv bootenv user.txt;" \ 225 "fi;" \ 226 "echo SD/MMC found on device ${mmcdev};" \ 227 "if run loadbootenv; then " \ 228 "echo Loaded environment from ${bootenv};" \ 229 "run importbootenv;" \ 230 "fi;" \ 231 "if test -n $uenvcmd; then " \ 232 "echo Running uenvcmd ...;" \ 233 "run uenvcmd;" \ 234 "fi;" \ 235 "if run loadimage; then " \ 236 "run mmcboot;" \ 237 "fi;" \ 238 "fi;" \ 239 "run nandboot;" \ 240 "setenv bootfile zImage;" \ 241 "if run loadimage; then " \ 242 "run loadfdt;" \ 243 "run mmcbootz; " \ 244 "fi; " \ 245 246 /* 247 * OMAP3 has 12 GP timers, they can be driven by the system clock 248 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 249 * This rate is divided by a local divisor. 250 */ 251 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 252 253 /*----------------------------------------------------------------------- 254 * FLASH and environment organization 255 */ 256 257 /* **** PISMO SUPPORT *** */ 258 259 /* Configure the PISMO */ 260 #define PISMO1_NAND_SIZE GPMC_SIZE_128M 261 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M 262 263 #if defined(CONFIG_CMD_NAND) 264 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE 265 #endif 266 267 /* Monitor at start of flash */ 268 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 269 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 270 271 #define CONFIG_ENV_IS_IN_NAND 1 272 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 273 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ 274 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 275 276 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 277 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 278 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 279 280 #define CONFIG_OMAP3_SPI 281 282 #define CONFIG_SYS_CACHELINE_SIZE 64 283 284 /* Defines for SPL */ 285 #define CONFIG_SPL_OMAP3_ID_NAND 286 287 /* NAND boot config */ 288 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 289 #define CONFIG_SYS_NAND_PAGE_COUNT 64 290 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 291 #define CONFIG_SYS_NAND_OOBSIZE 64 292 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 293 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 294 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 295 10, 11, 12, 13} 296 #define CONFIG_SYS_NAND_ECCSIZE 512 297 #define CONFIG_SYS_NAND_ECCBYTES 3 298 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 299 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 300 301 #endif /* __CONFIG_H */ 302