1 /*
2  * (C) Copyright 2006-2008
3  * Texas Instruments.
4  * Richard Woodruff <r-woodruff2@ti.com>
5  * Syed Mohammed Khasim <x0khasim@ti.com>
6  *
7  * Configuration settings for the TI OMAP3530 Beagle board.
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  */
11 
12 #ifndef __CONFIG_H
13 #define __CONFIG_H
14 
15 /*
16  * High Level Configuration Options
17  */
18 #define CONFIG_OMAP		1	/* in a TI OMAP core */
19 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
20 #define CONFIG_OMAP3_BEAGLE	1	/* working with BEAGLE */
21 #define CONFIG_OMAP_GPIO
22 #define CONFIG_OMAP_COMMON
23 
24 #define CONFIG_SDRC	/* The chip has SDRC controller */
25 
26 #include <asm/arch/cpu.h>		/* get chip and board defs */
27 #include <asm/arch/omap3.h>
28 
29 /*
30  * Display CPU and Board information
31  */
32 #define CONFIG_DISPLAY_CPUINFO		1
33 #define CONFIG_DISPLAY_BOARDINFO	1
34 
35 /* Clock Defines */
36 #define V_OSCK			26000000	/* Clock output from T2 */
37 #define V_SCLK			(V_OSCK >> 1)
38 
39 #define CONFIG_MISC_INIT_R
40 
41 #define CONFIG_OF_LIBFDT
42 #define CONFIG_CMD_BOOTZ
43 
44 #define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
45 #define CONFIG_SETUP_MEMORY_TAGS	1
46 #define CONFIG_INITRD_TAG		1
47 #define CONFIG_REVISION_TAG		1
48 
49 /*
50  * Size of malloc() pool
51  */
52 #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
53 						/* Sector */
54 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10))
55 
56 /*
57  * Hardware drivers
58  */
59 
60 /*
61  * NS16550 Configuration
62  */
63 #define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */
64 
65 #define CONFIG_SYS_NS16550
66 #define CONFIG_SYS_NS16550_SERIAL
67 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
68 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
69 
70 /*
71  * select serial console configuration
72  */
73 #define CONFIG_CONS_INDEX		3
74 #define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
75 #define CONFIG_SERIAL3			3	/* UART3 on Beagle Rev 2 */
76 
77 /* allow to overwrite serial and ethaddr */
78 #define CONFIG_ENV_OVERWRITE
79 #define CONFIG_BAUDRATE			115200
80 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
81 					115200}
82 #define CONFIG_GENERIC_MMC		1
83 #define CONFIG_MMC			1
84 #define CONFIG_OMAP_HSMMC		1
85 #define CONFIG_DOS_PARTITION		1
86 
87 /* Status LED */
88 #define CONFIG_STATUS_LED		1
89 #define CONFIG_BOARD_SPECIFIC_LED	1
90 #define STATUS_LED_BIT			0x01
91 #define STATUS_LED_STATE		STATUS_LED_ON
92 #define STATUS_LED_PERIOD		(CONFIG_SYS_HZ / 2)
93 #define STATUS_LED_BIT1			0x02
94 #define STATUS_LED_STATE1		STATUS_LED_ON
95 #define STATUS_LED_PERIOD1		(CONFIG_SYS_HZ / 2)
96 #define STATUS_LED_BOOT			STATUS_LED_BIT
97 #define STATUS_LED_GREEN		STATUS_LED_BIT1
98 
99 /* Enable Multi Bus support for I2C */
100 #define CONFIG_I2C_MULTI_BUS		1
101 
102 /* Probe all devices */
103 #define CONFIG_SYS_I2C_NOPROBES		{{0x0, 0x0}}
104 
105 /* USB */
106 #define CONFIG_MUSB_GADGET
107 #define CONFIG_USB_MUSB_OMAP2PLUS
108 #define CONFIG_MUSB_PIO_ONLY
109 #define CONFIG_USB_GADGET_DUALSPEED
110 #define CONFIG_TWL4030_USB		1
111 #define CONFIG_USB_ETHER
112 #define CONFIG_USB_ETHER_RNDIS
113 
114 /* USB EHCI */
115 #define CONFIG_CMD_USB
116 #define CONFIG_USB_EHCI
117 
118 #define CONFIG_USB_EHCI_OMAP
119 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	147
120 
121 #define CONFIG_USB_ULPI
122 #define CONFIG_USB_ULPI_VIEWPORT_OMAP
123 
124 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
125 #define CONFIG_USB_HOST_ETHER
126 #define CONFIG_USB_ETHER_SMSC95XX
127 #define CONFIG_USB_ETHER_ASIX
128 
129 
130 /* commands to include */
131 #include <config_cmd_default.h>
132 
133 #define CONFIG_CMD_ASKENV
134 
135 #define CONFIG_CMD_CACHE
136 #define CONFIG_CMD_EXT2		/* EXT2 Support			*/
137 #define CONFIG_CMD_FAT		/* FAT support			*/
138 #define CONFIG_CMD_FS_GENERIC	/* Generic FS support */
139 #define CONFIG_CMD_MTDPARTS	/* Enable MTD parts commands */
140 #define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
141 #define MTDIDS_DEFAULT			"nand0=nand"
142 #define MTDPARTS_DEFAULT		"mtdparts=nand:512k(x-loader),"\
143 					"1920k(u-boot),128k(u-boot-env),"\
144 					"4m(kernel),-(fs)"
145 
146 #define CONFIG_CMD_I2C		/* I2C serial bus support	*/
147 #define CONFIG_CMD_MMC		/* MMC support			*/
148 #define CONFIG_USB_STORAGE	/* USB storage support		*/
149 #define CONFIG_CMD_NAND		/* NAND support			*/
150 #define CONFIG_CMD_LED		/* LED support			*/
151 #define CONFIG_CMD_NET      /* bootp, tftpboot, rarpboot    */
152 #define CONFIG_CMD_NFS      /* NFS support          */
153 #define CONFIG_CMD_PING
154 #define CONFIG_CMD_DHCP
155 #define CONFIG_CMD_SETEXPR	/* Evaluate expressions		*/
156 #define CONFIG_CMD_GPIO     /* Enable gpio command */
157 
158 #undef CONFIG_CMD_FLASH		/* flinfo, erase, protect	*/
159 #undef CONFIG_CMD_FPGA		/* FPGA configuration Support	*/
160 #undef CONFIG_CMD_IMI		/* iminfo			*/
161 #undef CONFIG_CMD_IMLS		/* List all found images	*/
162 
163 #define CONFIG_SYS_NO_FLASH
164 #define CONFIG_HARD_I2C			1
165 #define CONFIG_SYS_I2C_SPEED		100000
166 #define CONFIG_SYS_I2C_SLAVE		1
167 #define CONFIG_I2C_MULTI_BUS		1
168 #define CONFIG_DRIVER_OMAP34XX_I2C	1
169 #define CONFIG_VIDEO_OMAP3	/* DSS Support			*/
170 
171 /*
172  * TWL4030
173  */
174 #define CONFIG_TWL4030_POWER		1
175 #define CONFIG_TWL4030_LED		1
176 
177 /*
178  * Board NAND Info.
179  */
180 #define CONFIG_SYS_NAND_QUIET_TEST	1
181 #define CONFIG_NAND_OMAP_GPMC
182 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
183 							/* to access nand */
184 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
185 							/* to access nand at */
186 							/* CS0 */
187 #define GPMC_NAND_ECC_LP_x16_LAYOUT	1
188 
189 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
190 							/* devices */
191 
192 /* Environment information */
193 #define CONFIG_BOOTDELAY		3
194 
195 #define CONFIG_EXTRA_ENV_SETTINGS \
196 	"loadaddr=0x80200000\0" \
197 	"rdaddr=0x81000000\0" \
198 	"fdt_high=0xffffffff\0" \
199 	"fdtaddr=0x80f80000\0" \
200 	"usbtty=cdc_acm\0" \
201 	"bootfile=uImage\0" \
202 	"ramdisk=ramdisk.gz\0" \
203 	"bootdir=/boot\0" \
204 	"bootpart=0:2\0" \
205 	"console=ttyO2,115200n8\0" \
206 	"mpurate=auto\0" \
207 	"buddy=none\0" \
208 	"optargs=\0" \
209 	"camera=none\0" \
210 	"vram=12M\0" \
211 	"dvimode=640x480MR-16@60\0" \
212 	"defaultdisplay=dvi\0" \
213 	"mmcdev=0\0" \
214 	"mmcroot=/dev/mmcblk0p2 rw\0" \
215 	"mmcrootfstype=ext3 rootwait\0" \
216 	"nandroot=ubi0:rootfs ubi.mtd=4\0" \
217 	"nandrootfstype=ubifs\0" \
218 	"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \
219 	"ramrootfstype=ext2\0" \
220 	"mmcargs=setenv bootargs console=${console} " \
221 		"${optargs} " \
222 		"mpurate=${mpurate} " \
223 		"buddy=${buddy} "\
224 		"camera=${camera} "\
225 		"vram=${vram} " \
226 		"omapfb.mode=dvi:${dvimode} " \
227 		"omapdss.def_disp=${defaultdisplay} " \
228 		"root=${mmcroot} " \
229 		"rootfstype=${mmcrootfstype}\0" \
230 	"nandargs=setenv bootargs console=${console} " \
231 		"${optargs} " \
232 		"mpurate=${mpurate} " \
233 		"buddy=${buddy} "\
234 		"camera=${camera} "\
235 		"vram=${vram} " \
236 		"omapfb.mode=dvi:${dvimode} " \
237 		"omapdss.def_disp=${defaultdisplay} " \
238 		"root=${nandroot} " \
239 		"rootfstype=${nandrootfstype}\0" \
240 	"findfdt=" \
241 		"if test $beaglerev = AxBx; then " \
242 			"setenv fdtfile omap3-beagle.dtb; fi; " \
243 		"if test $beaglerev = Cx; then " \
244 			"setenv fdtfile omap3-beagle.dtb; fi; " \
245 		"if test $beaglerev = xMAB; then " \
246 			"setenv fdtfile omap3-beagle-xm.dtb; fi; " \
247 		"if test $beaglerev = xMC; then " \
248 			"setenv fdtfile omap3-beagle-xm.dtb; fi; " \
249 		"if test $fdtfile = undefined; then " \
250 			"echo WARNING: Could not determine device tree to use; fi; \0" \
251 	"bootenv=uEnv.txt\0" \
252 	"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
253 	"importbootenv=echo Importing environment from mmc ...; " \
254 		"env import -t $loadaddr $filesize\0" \
255 	"ramargs=setenv bootargs console=${console} " \
256 		"${optargs} " \
257 		"mpurate=${mpurate} " \
258 		"buddy=${buddy} "\
259 		"vram=${vram} " \
260 		"omapfb.mode=dvi:${dvimode} " \
261 		"omapdss.def_disp=${defaultdisplay} " \
262 		"root=${ramroot} " \
263 		"rootfstype=${ramrootfstype}\0" \
264 	"loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \
265 	"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
266 	"loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
267 	"mmcboot=echo Booting from mmc ...; " \
268 		"run mmcargs; " \
269 		"bootm ${loadaddr}\0" \
270 	"mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \
271 		"run mmcargs; " \
272 		"bootz ${loadaddr} - ${fdtaddr}\0" \
273 	"nandboot=echo Booting from nand ...; " \
274 		"run nandargs; " \
275 		"nand read ${loadaddr} 280000 400000; " \
276 		"bootm ${loadaddr}\0" \
277 	"ramboot=echo Booting from ramdisk ...; " \
278 		"run ramargs; " \
279 		"bootm ${loadaddr}\0" \
280 	"userbutton=if gpio input 173; then run userbutton_xm; " \
281 		"else run userbutton_nonxm; fi;\0" \
282 	"userbutton_xm=gpio input 4;\0" \
283 	"userbutton_nonxm=gpio input 7;\0"
284 /* "run userbutton" will return 1 (false) if pressed and 0 (true) if not */
285 #define CONFIG_BOOTCOMMAND \
286 	"run findfdt; " \
287 	"mmc dev ${mmcdev}; if mmc rescan; then " \
288 		"if run userbutton; then " \
289 			"setenv bootenv uEnv.txt;" \
290 		"else " \
291 			"setenv bootenv user.txt;" \
292 		"fi;" \
293 		"echo SD/MMC found on device ${mmcdev};" \
294 		"if run loadbootenv; then " \
295 			"echo Loaded environment from ${bootenv};" \
296 			"run importbootenv;" \
297 		"fi;" \
298 		"if test -n $uenvcmd; then " \
299 			"echo Running uenvcmd ...;" \
300 			"run uenvcmd;" \
301 		"fi;" \
302 		"if run loadimage; then " \
303 			"run mmcboot;" \
304 		"fi;" \
305 	"fi;" \
306 	"run nandboot;" \
307 	"setenv bootfile zImage;" \
308 	"if run loadimage; then " \
309 		"run loadfdt;" \
310 		"run mmcbootz; " \
311 	"fi; " \
312 
313 #define CONFIG_AUTO_COMPLETE		1
314 /*
315  * Miscellaneous configurable options
316  */
317 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
318 #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
319 #define CONFIG_SYS_PROMPT		"OMAP3 beagleboard.org # "
320 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
321 /* Print Buffer Size */
322 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
323 					sizeof(CONFIG_SYS_PROMPT) + 16)
324 #define CONFIG_SYS_MAXARGS		32	/* max number of command args */
325 /* Boot Argument Buffer Size */
326 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
327 
328 #define CONFIG_SYS_ALT_MEMTEST		1
329 #define CONFIG_SYS_MEMTEST_START	(0x82000000)		/* memtest */
330 								/* defaults */
331 #define CONFIG_SYS_MEMTEST_END		(0x87FFFFFF) 		/* 128MB */
332 #define CONFIG_SYS_MEMTEST_SCRATCH	(0x81000000)	/* dummy address */
333 
334 #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0)	/* default */
335 							/* load address */
336 
337 /*
338  * OMAP3 has 12 GP timers, they can be driven by the system clock
339  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
340  * This rate is divided by a local divisor.
341  */
342 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
343 #define CONFIG_SYS_PTV			2       /* Divisor: 2^(PTV+1) => 8 */
344 #define CONFIG_SYS_HZ			1000
345 
346 /*-----------------------------------------------------------------------
347  * Physical Memory Map
348  */
349 #define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
350 #define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
351 #define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1
352 
353 /*-----------------------------------------------------------------------
354  * FLASH and environment organization
355  */
356 
357 /* **** PISMO SUPPORT *** */
358 
359 /* Configure the PISMO */
360 #define PISMO1_NAND_SIZE		GPMC_SIZE_128M
361 #define PISMO1_ONEN_SIZE		GPMC_SIZE_128M
362 
363 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
364 
365 #if defined(CONFIG_CMD_NAND)
366 #define CONFIG_SYS_FLASH_BASE		PISMO1_NAND_BASE
367 #endif
368 
369 /* Monitor at start of flash */
370 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
371 #define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
372 
373 #define CONFIG_ENV_IS_IN_NAND		1
374 #define ONENAND_ENV_OFFSET		0x260000 /* environment starts here */
375 #define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
376 
377 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
378 #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
379 #define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET
380 
381 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
382 #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
383 #define CONFIG_SYS_INIT_RAM_SIZE	0x800
384 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
385 					 CONFIG_SYS_INIT_RAM_SIZE - \
386 					 GENERATED_GBL_DATA_SIZE)
387 
388 #define CONFIG_OMAP3_SPI
389 
390 #define CONFIG_SYS_CACHELINE_SIZE	64
391 
392 /* Defines for SPL */
393 #define CONFIG_SPL
394 #define CONFIG_SPL_FRAMEWORK
395 #define CONFIG_SPL_NAND_SIMPLE
396 #define CONFIG_SPL_TEXT_BASE		0x40200800
397 #define CONFIG_SPL_MAX_SIZE		(54 * 1024)	/* 8 KB for stack */
398 #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
399 
400 #define CONFIG_SPL_BSS_START_ADDR	0x80000000
401 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
402 
403 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
404 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
405 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION	1
406 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"
407 
408 #define CONFIG_SPL_BOARD_INIT
409 #define CONFIG_SPL_LIBCOMMON_SUPPORT
410 #define CONFIG_SPL_LIBDISK_SUPPORT
411 #define CONFIG_SPL_I2C_SUPPORT
412 #define CONFIG_SPL_LIBGENERIC_SUPPORT
413 #define CONFIG_SPL_MMC_SUPPORT
414 #define CONFIG_SPL_FAT_SUPPORT
415 #define CONFIG_SPL_SERIAL_SUPPORT
416 #define CONFIG_SPL_NAND_SUPPORT
417 #define CONFIG_SPL_NAND_BASE
418 #define CONFIG_SPL_NAND_DRIVERS
419 #define CONFIG_SPL_NAND_ECC
420 #define CONFIG_SPL_GPIO_SUPPORT
421 #define CONFIG_SPL_POWER_SUPPORT
422 #define CONFIG_SPL_OMAP3_ID_NAND
423 #define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
424 
425 /* NAND boot config */
426 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
427 #define CONFIG_SYS_NAND_PAGE_COUNT	64
428 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
429 #define CONFIG_SYS_NAND_OOBSIZE		64
430 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
431 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
432 #define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9,\
433 						10, 11, 12, 13}
434 #define CONFIG_SYS_NAND_ECCSIZE		512
435 #define CONFIG_SYS_NAND_ECCBYTES	3
436 #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
437 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
438 
439 /*
440  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
441  * 64 bytes before this address should be set aside for u-boot.img's
442  * header. That is 0x800FFFC0--0x80100000 should not be used for any
443  * other needs.
444  */
445 #define CONFIG_SYS_TEXT_BASE		0x80100000
446 #define CONFIG_SYS_SPL_MALLOC_START	0x80208000
447 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
448 
449 #endif /* __CONFIG_H */
450