1 /* 2 * Copyright (C) 2014 Samsung Electronics 3 * Sanghee Kim <sh0130.kim@samsung.com> 4 * Piotr Wilczek <p.wilczek@samsung.com> 5 * Przemyslaw Marczak <p.marczak@samsung.com> 6 * 7 * Configuation settings for the Odroid-U3 (EXYNOS4412) board. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __CONFIG_ODROID_U3_H 13 #define __CONFIG_ODROID_U3_H 14 15 #include <configs/exynos4-common.h> 16 17 #define CONFIG_SYS_L2CACHE_OFF 18 #ifndef CONFIG_SYS_L2CACHE_OFF 19 #define CONFIG_SYS_L2_PL310 20 #define CONFIG_SYS_PL310_BASE 0x10502000 21 #endif 22 23 #define CONFIG_MACH_TYPE 4289 24 25 #define CONFIG_NR_DRAM_BANKS 8 26 #define CONFIG_SYS_SDRAM_BASE 0x40000000 27 #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ 28 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE 29 /* Reserve the last 1 MiB for the secure firmware */ 30 #define CONFIG_SYS_MEM_TOP_HIDE (1UL << 20UL) 31 #define CONFIG_TZSW_RESERVED_DRAM_SIZE CONFIG_SYS_MEM_TOP_HIDE 32 33 /* memtest works on */ 34 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 35 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000) 36 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) 37 38 #include <linux/sizes.h> 39 40 /* select serial console configuration */ 41 #define CONFIG_SERIAL1 42 43 /* Console configuration */ 44 45 #define CONFIG_BOOTCOMMAND "run autoboot" 46 #define CONFIG_DEFAULT_CONSOLE "ttySAC1,115200n8" 47 48 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ 49 - GENERATED_GBL_DATA_SIZE) 50 51 #define CONFIG_SYS_MONITOR_BASE 0x00000000 52 53 #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV 54 #define CONFIG_ENV_SIZE 4096 55 #define CONFIG_ENV_OFFSET (SZ_1K * 1280) /* 1.25 MiB offset */ 56 #define CONFIG_ENV_OVERWRITE 57 58 /* Partitions name */ 59 #define PARTS_BOOT "boot" 60 #define PARTS_ROOT "platform" 61 62 #define CONFIG_DFU_ALT \ 63 "uImage fat 0 1;" \ 64 "zImage fat 0 1;" \ 65 "Image.itb fat 0 1;" \ 66 "uInitrd fat 0 1;" \ 67 "exynos4412-odroidu3.dtb fat 0 1;" \ 68 "exynos4412-odroidx2.dtb fat 0 1;" \ 69 ""PARTS_BOOT" part 0 1;" \ 70 ""PARTS_ROOT" part 0 2\0" \ 71 72 #define CONFIG_SET_DFU_ALT_INFO 73 #define CONFIG_SET_DFU_ALT_BUF_LEN (SZ_1K) 74 75 #define CONFIG_DFU_ALT_BOOT_EMMC \ 76 "u-boot raw 0x3e 0x800 mmcpart 1;" \ 77 "bl1 raw 0x0 0x1e mmcpart 1;" \ 78 "bl2 raw 0x1e 0x1d mmcpart 1;" \ 79 "tzsw raw 0x83e 0x138 mmcpart 1\0" 80 81 #define CONFIG_DFU_ALT_BOOT_SD \ 82 "u-boot raw 0x3f 0x800;" \ 83 "bl1 raw 0x1 0x1e;" \ 84 "bl2 raw 0x1f 0x1d;" \ 85 "tzsw raw 0x83f 0x138\0" 86 87 /* 88 * Bootable media layout: 89 * dev: SD eMMC(part boot) 90 * BL1 1 0 91 * BL2 31 30 92 * UBOOT 63 62 93 * TZSW 2111 2110 94 * ENV 2560 2560(part user) 95 * 96 * MBR Primary partiions: 97 * Num Name Size Offset 98 * 1. BOOT: 100MiB 2MiB 99 * 2. ROOT: - 100 */ 101 #define CONFIG_EXTRA_ENV_SETTINGS \ 102 "loadbootscript=load mmc ${mmcbootdev}:${mmcbootpart} ${scriptaddr} " \ 103 "boot.scr\0" \ 104 "loadkernel=load mmc ${mmcbootdev}:${mmcbootpart} ${kerneladdr} " \ 105 "${kernelname}\0" \ 106 "loadinitrd=load mmc ${mmcbootdev}:${mmcbootpart} ${initrdaddr} " \ 107 "${initrdname}\0" \ 108 "loaddtb=load mmc ${mmcbootdev}:${mmcbootpart} ${fdtaddr} " \ 109 "${fdtfile}\0" \ 110 "check_ramdisk=" \ 111 "if run loadinitrd; then " \ 112 "setenv initrd_addr ${initrdaddr};" \ 113 "else " \ 114 "setenv initrd_addr -;" \ 115 "fi;\0" \ 116 "check_dtb=" \ 117 "if run loaddtb; then " \ 118 "setenv fdt_addr ${fdtaddr};" \ 119 "else " \ 120 "setenv fdt_addr;" \ 121 "fi;\0" \ 122 "kernel_args=" \ 123 "setenv bootargs root=/dev/mmcblk${mmcrootdev}p${mmcrootpart}" \ 124 " rootwait ${console} ${opts}\0" \ 125 "boot_script=" \ 126 "run loadbootscript;" \ 127 "source ${scriptaddr}\0" \ 128 "boot_fit=" \ 129 "setenv kerneladdr 0x42000000;" \ 130 "setenv kernelname Image.itb;" \ 131 "run loadkernel;" \ 132 "run kernel_args;" \ 133 "bootm ${kerneladdr}#${boardname}\0" \ 134 "boot_uimg=" \ 135 "setenv kerneladdr 0x40007FC0;" \ 136 "setenv kernelname uImage;" \ 137 "run check_dtb;" \ 138 "run check_ramdisk;" \ 139 "run loadkernel;" \ 140 "run kernel_args;" \ 141 "bootm ${kerneladdr} ${initrd_addr} ${fdt_addr};\0" \ 142 "boot_zimg=" \ 143 "setenv kerneladdr 0x40007FC0;" \ 144 "setenv kernelname zImage;" \ 145 "run check_dtb;" \ 146 "run check_ramdisk;" \ 147 "run loadkernel;" \ 148 "run kernel_args;" \ 149 "bootz ${kerneladdr} ${initrd_addr} ${fdt_addr};\0" \ 150 "autoboot=" \ 151 "if test -e mmc 0 boot.scr; then; " \ 152 "run boot_script; " \ 153 "elif test -e mmc 0 Image.itb; then; " \ 154 "run boot_fit;" \ 155 "elif test -e mmc 0 zImage; then; " \ 156 "run boot_zimg;" \ 157 "elif test -e mmc 0 uImage; then; " \ 158 "run boot_uimg;" \ 159 "fi;\0" \ 160 "console=" CONFIG_DEFAULT_CONSOLE "\0" \ 161 "mmcbootdev=0\0" \ 162 "mmcbootpart=1\0" \ 163 "mmcrootdev=0\0" \ 164 "mmcrootpart=2\0" \ 165 "bootdelay=0\0" \ 166 "dfu_alt_system="CONFIG_DFU_ALT \ 167 "dfu_alt_info=Please reset the board\0" \ 168 "consoleon=set console console=ttySAC1,115200n8; save; reset\0" \ 169 "consoleoff=set console console=ram; save; reset\0" \ 170 "initrdname=uInitrd\0" \ 171 "initrdaddr=42000000\0" \ 172 "scriptaddr=0x42000000\0" \ 173 "fdtaddr=40800000\0" 174 175 /* GPT */ 176 177 /* Security subsystem - enable hw_rand() */ 178 #define CONFIG_EXYNOS_ACE_SHA 179 180 /* USB */ 181 #define CONFIG_USB_EHCI_EXYNOS 182 183 /* 184 * Supported Odroid boards: X3, U3 185 * TODO: Add Odroid X support 186 */ 187 #define CONFIG_MISC_COMMON 188 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 189 #define CONFIG_BOARD_TYPES 190 #define CONFIG_MISC_INIT_R 191 192 #undef CONFIG_REVISION_TAG 193 194 #endif /* __CONFIG_H */ 195