xref: /openbmc/u-boot/include/configs/nitrogen6x.h (revision 68fbc0e6)
1 /*
2  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the Boundary Devices Nitrogen6X
5  * and Freescale i.MX6Q Sabre Lite boards.
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of
10  * the License, or (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.		See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20  * MA 02111-1307 USA
21  */
22 
23 #ifndef __CONFIG_H
24 #define __CONFIG_H
25 
26 #define CONFIG_MX6
27 #define CONFIG_DISPLAY_CPUINFO
28 #define CONFIG_DISPLAY_BOARDINFO
29 
30 #define CONFIG_MACH_TYPE	3769
31 
32 #include <asm/arch/imx-regs.h>
33 #include <asm/imx-common/gpio.h>
34 
35 #define CONFIG_CMDLINE_TAG
36 #define CONFIG_SETUP_MEMORY_TAGS
37 #define CONFIG_INITRD_TAG
38 #define CONFIG_REVISION_TAG
39 
40 /* Size of malloc() pool */
41 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
42 
43 #define CONFIG_BOARD_EARLY_INIT_F
44 #define CONFIG_MISC_INIT_R
45 #define CONFIG_MXC_GPIO
46 
47 #define CONFIG_MXC_UART
48 #define CONFIG_MXC_UART_BASE	       UART2_BASE
49 
50 #define CONFIG_CMD_SF
51 #ifdef CONFIG_CMD_SF
52 #define CONFIG_SPI_FLASH
53 #define CONFIG_SPI_FLASH_SST
54 #define CONFIG_MXC_SPI
55 #define CONFIG_SF_DEFAULT_BUS  0
56 #define CONFIG_SF_DEFAULT_CS   (0|(IMX_GPIO_NR(3, 19)<<8))
57 #define CONFIG_SF_DEFAULT_SPEED 25000000
58 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
59 #endif
60 
61 /* I2C Configs */
62 #define CONFIG_CMD_I2C
63 #define CONFIG_I2C_MULTI_BUS
64 #define CONFIG_I2C_MXC
65 #define CONFIG_SYS_I2C_SPEED		100000
66 
67 /* OCOTP Configs */
68 #define CONFIG_CMD_IMXOTP
69 #ifdef CONFIG_CMD_IMXOTP
70 #define CONFIG_IMX_OTP
71 #define IMX_OTP_BASE			OCOTP_BASE_ADDR
72 #define IMX_OTP_ADDR_MAX		0x7F
73 #define IMX_OTP_DATA_ERROR_VAL		0xBADABADA
74 #define IMX_OTPWRITE_ENABLED
75 #endif
76 
77 /* MMC Configs */
78 #define CONFIG_FSL_ESDHC
79 #define CONFIG_FSL_USDHC
80 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
81 #define CONFIG_SYS_FSL_USDHC_NUM       2
82 
83 #define CONFIG_MMC
84 #define CONFIG_CMD_MMC
85 #define CONFIG_GENERIC_MMC
86 #define CONFIG_BOUNCE_BUFFER
87 #define CONFIG_CMD_EXT2
88 #define CONFIG_CMD_FAT
89 #define CONFIG_DOS_PARTITION
90 
91 #ifdef CONFIG_MX6Q
92 #define CONFIG_CMD_SATA
93 #endif
94 
95 /*
96  * SATA Configs
97  */
98 #ifdef CONFIG_CMD_SATA
99 #define CONFIG_DWC_AHSATA
100 #define CONFIG_SYS_SATA_MAX_DEVICE	1
101 #define CONFIG_DWC_AHSATA_PORT_ID	0
102 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
103 #define CONFIG_LBA48
104 #define CONFIG_LIBATA
105 #endif
106 
107 #define CONFIG_CMD_PING
108 #define CONFIG_CMD_DHCP
109 #define CONFIG_CMD_MII
110 #define CONFIG_CMD_NET
111 #define CONFIG_FEC_MXC
112 #define CONFIG_MII
113 #define IMX_FEC_BASE			ENET_BASE_ADDR
114 #define CONFIG_FEC_XCV_TYPE		RGMII
115 #define CONFIG_ETHPRIME			"FEC"
116 #define CONFIG_FEC_MXC_PHYADDR		6
117 #define CONFIG_PHYLIB
118 #define CONFIG_PHY_MICREL
119 #define CONFIG_PHY_MICREL_KSZ9021
120 
121 /* USB Configs */
122 #define CONFIG_CMD_USB
123 #define CONFIG_CMD_FAT
124 #define CONFIG_USB_EHCI
125 #define CONFIG_USB_EHCI_MX6
126 #define CONFIG_USB_STORAGE
127 #define CONFIG_USB_HOST_ETHER
128 #define CONFIG_USB_ETHER_ASIX
129 #define CONFIG_USB_ETHER_SMSC95XX
130 #define CONFIG_MXC_USB_PORT	1
131 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
132 #define CONFIG_MXC_USB_FLAGS	0
133 
134 /* Miscellaneous commands */
135 #define CONFIG_CMD_BMODE
136 #define CONFIG_CMD_SETEXPR
137 
138 /* Framebuffer and LCD */
139 #define CONFIG_VIDEO
140 #define CONFIG_VIDEO_IPUV3
141 #define CONFIG_CFB_CONSOLE
142 #define CONFIG_VGA_AS_SINGLE_DEVICE
143 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
144 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
145 #define CONFIG_VIDEO_BMP_RLE8
146 #define CONFIG_SPLASH_SCREEN
147 #define CONFIG_BMP_16BPP
148 #define CONFIG_VIDEO_LOGO
149 #define CONFIG_IPUV3_CLK 260000000
150 #define CONFIG_CMD_HDMIDETECT
151 #define CONFIG_CONSOLE_MUX
152 
153 /* allow to overwrite serial and ethaddr */
154 #define CONFIG_ENV_OVERWRITE
155 #define CONFIG_CONS_INDEX	       1
156 #define CONFIG_BAUDRATE			       115200
157 
158 /* Command definition */
159 #include <config_cmd_default.h>
160 
161 #undef CONFIG_CMD_IMLS
162 
163 #define CONFIG_BOOTDELAY	       1
164 
165 #define CONFIG_PREBOOT                 ""
166 
167 #define CONFIG_LOADADDR			       0x12000000
168 #define CONFIG_SYS_TEXT_BASE	       0x17800000
169 
170 #ifdef CONFIG_CMD_SATA
171 #define CONFIG_DRIVE_SATA "sata "
172 #else
173 #define CONFIG_DRIVE_SATA
174 #endif
175 
176 #ifdef CONFIG_CMD_MMC
177 #define CONFIG_DRIVE_MMC "mmc "
178 #else
179 #define CONFIG_DRIVE_MMC
180 #endif
181 
182 #define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC
183 
184 #define CONFIG_EXTRA_ENV_SETTINGS \
185 	"console=ttymxc1\0" \
186 	"clearenv=if sf probe || sf probe || sf probe 1 ; then " \
187 		"sf erase 0xc0000 0x2000 && " \
188 		"echo restored environment to factory default ; fi\0" \
189 	"bootcmd=for dtype in " CONFIG_DRIVE_TYPES \
190 		"; do " \
191 			"for disk in 0 1 ; do ${dtype} dev ${disk} ;" \
192 				"for fs in fat ext2 ; do " \
193 					"${fs}load " \
194 						"${dtype} ${disk}:1 " \
195 						"10008000 " \
196 						"/6x_bootscript" \
197 						"&& source 10008000 ; " \
198 				"done ; " \
199 			"done ; " \
200 		"done; " \
201 		"setenv stdout serial,vga ; " \
202 		"echo ; echo 6x_bootscript not found ; " \
203 		"echo ; echo serial console at 115200, 8N1 ; echo ; " \
204 		"echo details at http://boundarydevices.com/6q_bootscript ; " \
205 		"setenv stdout serial\0" \
206 	"upgradeu=for dtype in " CONFIG_DRIVE_TYPES \
207 		"; do " \
208 		"for disk in 0 1 ; do ${dtype} dev ${disk} ;" \
209 		     "for fs in fat ext2 ; do " \
210 				"${fs}load ${dtype} ${disk}:1 10008000 " \
211 					"/6x_upgrade " \
212 					"&& source 10008000 ; " \
213 			"done ; " \
214 		"done ; " \
215 	"done\0" \
216 
217 /* Miscellaneous configurable options */
218 #define CONFIG_SYS_LONGHELP
219 #define CONFIG_SYS_HUSH_PARSER
220 #define CONFIG_SYS_PROMPT	       "U-Boot > "
221 #define CONFIG_AUTO_COMPLETE
222 #define CONFIG_SYS_CBSIZE	       1024
223 
224 /* Print Buffer Size */
225 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
226 #define CONFIG_SYS_MAXARGS	       16
227 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
228 
229 #define CONFIG_SYS_MEMTEST_START       0x10000000
230 #define CONFIG_SYS_MEMTEST_END	       0x10010000
231 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
232 
233 #define CONFIG_SYS_LOAD_ADDR	       CONFIG_LOADADDR
234 #define CONFIG_SYS_HZ		       1000
235 
236 #define CONFIG_CMDLINE_EDITING
237 
238 /* Physical Memory Map */
239 #define CONFIG_NR_DRAM_BANKS	       1
240 #define PHYS_SDRAM		       MMDC0_ARB_BASE_ADDR
241 
242 #define CONFIG_SYS_SDRAM_BASE	       PHYS_SDRAM
243 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
244 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
245 
246 #define CONFIG_SYS_INIT_SP_OFFSET \
247 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
248 #define CONFIG_SYS_INIT_SP_ADDR \
249 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
250 
251 /* FLASH and environment organization */
252 #define CONFIG_SYS_NO_FLASH
253 
254 #define CONFIG_ENV_SIZE			(8 * 1024)
255 
256 /* #define CONFIG_ENV_IS_IN_MMC */
257 #define CONFIG_ENV_IS_IN_SPI_FLASH
258 
259 #if defined(CONFIG_ENV_IS_IN_MMC)
260 #define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
261 #define CONFIG_SYS_MMC_ENV_DEV		0
262 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
263 #define CONFIG_ENV_OFFSET		(768 * 1024)
264 #define CONFIG_ENV_SECT_SIZE		(8 * 1024)
265 #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
266 #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
267 #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
268 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
269 #endif
270 
271 #define CONFIG_OF_LIBFDT
272 #define CONFIG_CMD_BOOTZ
273 
274 #define CONFIG_SYS_DCACHE_OFF
275 
276 #ifndef CONFIG_SYS_DCACHE_OFF
277 #define CONFIG_CMD_CACHE
278 #endif
279 
280 #define CONFIG_CMD_BMP
281 
282 #define CONFIG_CMD_TIME
283 #define CONFIG_SYS_ALT_MEMTEST
284 
285 #endif	       /* __CONFIG_H */
286