1 /* 2 * Copyright (C) 2013 Marek Vasut <marex@denx.de> 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License as 6 * published by the Free Software Foundation; either version 2 of 7 * the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 17 * MA 02111-1307 USA 18 */ 19 #ifndef __CONFIGS_MXS_H__ 20 #define __CONFIGS_MXS_H__ 21 22 /* 23 * Includes 24 */ 25 26 #if defined(CONFIG_MX23) && defined(CONFIG_MX28) 27 #error Select either CONFIG_MX23 or CONFIG_MX28 , never both! 28 #elif !defined(CONFIG_MX23) && !defined(CONFIG_MX28) 29 #error Select one of CONFIG_MX23 or CONFIG_MX28 ! 30 #endif 31 32 #include <asm/arch/regs-base.h> 33 34 #if defined(CONFIG_MX23) 35 #include <asm/arch/iomux-mx23.h> 36 #elif defined(CONFIG_MX28) 37 #include <asm/arch/iomux-mx28.h> 38 #endif 39 40 /* 41 * CPU specifics 42 */ 43 44 /* Startup hooks */ 45 46 /* SPL */ 47 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE 48 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" 49 50 /* Memory sizes */ 51 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ 52 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ 53 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ 54 55 /* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */ 56 #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 57 #if defined(CONFIG_MX23) 58 #define CONFIG_SYS_INIT_RAM_SIZE (32 * 1024) 59 #elif defined(CONFIG_MX28) 60 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) 61 #endif 62 63 /* Point initial SP in SRAM so SPL can use it too. */ 64 #define CONFIG_SYS_INIT_SP_OFFSET \ 65 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 66 #define CONFIG_SYS_INIT_SP_ADDR \ 67 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 68 69 /* 70 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some 71 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot 72 * binary. In case there was more of this mess, 0x100 bytes are skipped. 73 * 74 * In case of a HAB boot, we cannot for some weird reason use the first 4KiB 75 * of DRAM when loading. Moreover, we use the first 4 KiB for IVT and CST 76 * blocks, thus U-Boot starts at offset +8 KiB of DRAM start. 77 * 78 * As for the SPL, we must avoid the first 4 KiB as well, but we load the 79 * IVT and CST to 0x8000, so we don't need to waste the subsequent 4 KiB. 80 */ 81 #define CONFIG_SYS_TEXT_BASE 0x40002000 82 #define CONFIG_SPL_TEXT_BASE 0x00001000 83 84 /* U-Boot general configuration */ 85 #define CONFIG_SYS_LONGHELP 86 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 87 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 88 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 89 /* Boot argument buffer size */ 90 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 91 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 92 93 /* Booting Linux */ 94 #define CONFIG_CMDLINE_TAG 95 #define CONFIG_SETUP_MEMORY_TAGS 96 97 /* 98 * Drivers 99 */ 100 101 /* APBH DMA */ 102 #define CONFIG_APBH_DMA 103 104 /* GPIO */ 105 #define CONFIG_MXS_GPIO 106 107 /* 108 * DUART Serial Driver. 109 * Conflicts with AUART driver which can be set by board. 110 */ 111 #define CONFIG_PL011_SERIAL 112 #define CONFIG_PL011_CLOCK 24000000 113 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } 114 #define CONFIG_CONS_INDEX 0 115 /* Default baudrate can be overridden by board! */ 116 117 /* FEC Ethernet on SoC */ 118 #ifdef CONFIG_FEC_MXC 119 #define CONFIG_MII 120 #ifndef CONFIG_ETHPRIME 121 #define CONFIG_ETHPRIME "FEC0" 122 #endif 123 #ifndef CONFIG_FEC_XCV_TYPE 124 #define CONFIG_FEC_XCV_TYPE RMII 125 #endif 126 #endif 127 128 /* LCD */ 129 #ifdef CONFIG_VIDEO 130 #define CONFIG_VIDEO_MXS 131 #endif 132 133 /* MMC */ 134 #ifdef CONFIG_CMD_MMC 135 #define CONFIG_BOUNCE_BUFFER 136 #endif 137 138 /* NAND */ 139 #ifdef CONFIG_CMD_NAND 140 #define CONFIG_NAND_MXS 141 #define CONFIG_SYS_MAX_NAND_DEVICE 1 142 #define CONFIG_SYS_NAND_BASE 0x60000000 143 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 144 #endif 145 146 /* OCOTP */ 147 #ifdef CONFIG_CMD_FUSE 148 #define CONFIG_MXS_OCOTP 149 #endif 150 151 /* SPI */ 152 #ifdef CONFIG_CMD_SPI 153 #define CONFIG_HARD_SPI 154 #define CONFIG_MXS_SPI 155 #define CONFIG_SPI_HALF_DUPLEX 156 #endif 157 158 /* USB */ 159 #ifdef CONFIG_CMD_USB 160 #define CONFIG_USB_EHCI_MXS 161 #define CONFIG_EHCI_IS_TDI 162 #endif 163 164 #endif /* __CONFIGS_MXS_H__ */ 165