1 /* 2 * Copyright (C) 2013 Marek Vasut <marex@denx.de> 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License as 6 * published by the Free Software Foundation; either version 2 of 7 * the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 17 * MA 02111-1307 USA 18 */ 19 #ifndef __CONFIGS_MXS_H__ 20 #define __CONFIGS_MXS_H__ 21 22 /* 23 * Includes 24 */ 25 26 #if defined(CONFIG_MX23) && defined(CONFIG_MX28) 27 #error Select either CONFIG_MX23 or CONFIG_MX28 , never both! 28 #elif !defined(CONFIG_MX23) && !defined(CONFIG_MX28) 29 #error Select one of CONFIG_MX23 or CONFIG_MX28 ! 30 #endif 31 32 #include <asm/arch/regs-base.h> 33 34 #if defined(CONFIG_MX23) 35 #include <asm/arch/iomux-mx23.h> 36 #elif defined(CONFIG_MX28) 37 #include <asm/arch/iomux-mx28.h> 38 #endif 39 40 /* 41 * CPU specifics 42 */ 43 44 /* Ticks per second */ 45 #define CONFIG_SYS_HZ 1000 46 47 /* MXS uses FDT */ 48 #define CONFIG_OF_LIBFDT 49 50 /* Startup hooks */ 51 #define CONFIG_BOARD_EARLY_INIT_F 52 #define CONFIG_ARCH_MISC_INIT 53 54 /* SPL */ 55 #define CONFIG_SPL 56 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE 57 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" 58 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" 59 #define CONFIG_SPL_LIBCOMMON_SUPPORT 60 #define CONFIG_SPL_LIBGENERIC_SUPPORT 61 #define CONFIG_SPL_GPIO_SUPPORT 62 63 /* Memory sizes */ 64 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ 65 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */ 66 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ 67 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ 68 69 /* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */ 70 #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 71 #if defined(CONFIG_MX23) 72 #define CONFIG_SYS_INIT_RAM_SIZE (32 * 1024) 73 #elif defined(CONFIG_MX28) 74 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) 75 #endif 76 77 /* Point initial SP in SRAM so SPL can use it too. */ 78 #define CONFIG_SYS_INIT_SP_OFFSET \ 79 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 80 #define CONFIG_SYS_INIT_SP_ADDR \ 81 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 82 83 /* 84 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some 85 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot 86 * binary. In case there was more of this mess, 0x100 bytes are skipped. 87 */ 88 #define CONFIG_SYS_TEXT_BASE 0x40000100 89 90 /* U-Boot general configuration */ 91 #define CONFIG_SYS_LONGHELP 92 #ifndef CONFIG_SYS_PROMPT 93 #define CONFIG_SYS_PROMPT "=> " 94 #endif 95 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 96 #define CONFIG_SYS_PBSIZE \ 97 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 98 /* Print buffer size */ 99 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 100 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 101 /* Boot argument buffer size */ 102 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */ 103 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 104 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 105 #define CONFIG_SYS_HUSH_PARSER 106 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 107 108 /* Booting Linux */ 109 #define CONFIG_CMDLINE_TAG 110 #define CONFIG_SETUP_MEMORY_TAGS 111 112 /* 113 * Drivers 114 */ 115 116 /* APBH DMA */ 117 #define CONFIG_APBH_DMA 118 119 /* GPIO */ 120 #define CONFIG_MXS_GPIO 121 122 /* DUART Serial Driver */ 123 #define CONFIG_PL011_SERIAL 124 #define CONFIG_PL011_CLOCK 24000000 125 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } 126 #define CONFIG_CONS_INDEX 0 127 /* Default baudrate can be overriden by board! */ 128 #ifndef CONFIG_BAUDRATE 129 #define CONFIG_BAUDRATE 115200 130 #endif 131 132 /* FEC Ethernet on SoC */ 133 #ifdef CONFIG_FEC_MXC 134 #define CONFIG_MII 135 #ifndef CONFIG_ETHPRIME 136 #define CONFIG_ETHPRIME "FEC0" 137 #endif 138 #ifndef CONFIG_FEC_XCV_TYPE 139 #define CONFIG_FEC_XCV_TYPE RMII 140 #endif 141 #endif 142 143 /* I2C */ 144 #ifdef CONFIG_CMD_I2C 145 #define CONFIG_I2C_MXS 146 #define CONFIG_HARD_I2C 147 #ifndef CONFIG_SYS_I2C_SPEED 148 #define CONFIG_SYS_I2C_SPEED 400000 149 #endif 150 #endif 151 152 /* LCD */ 153 #ifdef CONFIG_VIDEO 154 #define CONFIG_CFB_CONSOLE 155 #define CONFIG_VIDEO_MXS 156 #define CONFIG_VIDEO_SW_CURSOR 157 #define CONFIG_VGA_AS_SINGLE_DEVICE 158 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 159 #endif 160 161 /* MMC */ 162 #ifdef CONFIG_CMD_MMC 163 #define CONFIG_MMC 164 #define CONFIG_GENERIC_MMC 165 #define CONFIG_BOUNCE_BUFFER 166 #define CONFIG_MXS_MMC 167 #endif 168 169 /* NAND */ 170 #ifdef CONFIG_CMD_NAND 171 #define CONFIG_NAND_MXS 172 #define CONFIG_SYS_MAX_NAND_DEVICE 1 173 #define CONFIG_SYS_NAND_BASE 0x60000000 174 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 175 #endif 176 177 /* SPI */ 178 #ifdef CONFIG_CMD_SPI 179 #define CONFIG_HARD_SPI 180 #define CONFIG_MXS_SPI 181 #define CONFIG_SPI_HALF_DUPLEX 182 #endif 183 184 /* USB */ 185 #ifdef CONFIG_CMD_USB 186 #define CONFIG_USB_EHCI 187 #define CONFIG_USB_EHCI_MXS 188 #define CONFIG_EHCI_IS_TDI 189 #endif 190 191 #endif /* __CONFIGS_MXS_H__ */ 192