1 /* 2 * Copyright (C) 2013 Marek Vasut <marex@denx.de> 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License as 6 * published by the Free Software Foundation; either version 2 of 7 * the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 17 * MA 02111-1307 USA 18 */ 19 #ifndef __CONFIGS_MXS_H__ 20 #define __CONFIGS_MXS_H__ 21 22 /* 23 * Includes 24 */ 25 26 #if defined(CONFIG_MX23) && defined(CONFIG_MX28) 27 #error Select either CONFIG_MX23 or CONFIG_MX28 , never both! 28 #elif !defined(CONFIG_MX23) && !defined(CONFIG_MX28) 29 #error Select one of CONFIG_MX23 or CONFIG_MX28 ! 30 #endif 31 32 #include <asm/arch/regs-base.h> 33 34 #if defined(CONFIG_MX23) 35 #include <asm/arch/iomux-mx23.h> 36 #elif defined(CONFIG_MX28) 37 #include <asm/arch/iomux-mx28.h> 38 #endif 39 40 /* 41 * CPU specifics 42 */ 43 44 /* MXS uses FDT */ 45 #define CONFIG_OF_LIBFDT 46 47 /* Startup hooks */ 48 #define CONFIG_BOARD_EARLY_INIT_F 49 #define CONFIG_ARCH_MISC_INIT 50 51 /* SPL */ 52 #define CONFIG_SPL 53 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE 54 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" 55 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" 56 #define CONFIG_SPL_LIBCOMMON_SUPPORT 57 #define CONFIG_SPL_LIBGENERIC_SUPPORT 58 #define CONFIG_SPL_GPIO_SUPPORT 59 60 /* Memory sizes */ 61 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ 62 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */ 63 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ 64 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ 65 66 /* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */ 67 #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 68 #if defined(CONFIG_MX23) 69 #define CONFIG_SYS_INIT_RAM_SIZE (32 * 1024) 70 #elif defined(CONFIG_MX28) 71 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) 72 #endif 73 74 /* Point initial SP in SRAM so SPL can use it too. */ 75 #define CONFIG_SYS_INIT_SP_OFFSET \ 76 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 77 #define CONFIG_SYS_INIT_SP_ADDR \ 78 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 79 80 /* 81 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some 82 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot 83 * binary. In case there was more of this mess, 0x100 bytes are skipped. 84 */ 85 #define CONFIG_SYS_TEXT_BASE 0x40000100 86 87 /* U-Boot general configuration */ 88 #define CONFIG_SYS_LONGHELP 89 #ifndef CONFIG_SYS_PROMPT 90 #endif 91 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 92 #define CONFIG_SYS_PBSIZE \ 93 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 94 /* Print buffer size */ 95 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 96 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 97 /* Boot argument buffer size */ 98 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */ 99 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 100 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 101 #define CONFIG_SYS_HUSH_PARSER 102 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 103 104 /* Booting Linux */ 105 #define CONFIG_CMDLINE_TAG 106 #define CONFIG_SETUP_MEMORY_TAGS 107 108 /* 109 * Drivers 110 */ 111 112 /* APBH DMA */ 113 #define CONFIG_APBH_DMA 114 115 /* GPIO */ 116 #define CONFIG_MXS_GPIO 117 118 /* 119 * DUART Serial Driver. 120 * Conflicts with AUART driver which can be set by board. 121 */ 122 #ifndef CONFIG_MXS_AUART 123 #define CONFIG_PL011_SERIAL 124 #define CONFIG_PL011_CLOCK 24000000 125 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } 126 #define CONFIG_CONS_INDEX 0 127 #endif 128 /* Default baudrate can be overriden by board! */ 129 #ifndef CONFIG_BAUDRATE 130 #define CONFIG_BAUDRATE 115200 131 #endif 132 133 /* FEC Ethernet on SoC */ 134 #ifdef CONFIG_FEC_MXC 135 #define CONFIG_MII 136 #ifndef CONFIG_ETHPRIME 137 #define CONFIG_ETHPRIME "FEC0" 138 #endif 139 #ifndef CONFIG_FEC_XCV_TYPE 140 #define CONFIG_FEC_XCV_TYPE RMII 141 #endif 142 #endif 143 144 /* I2C */ 145 #ifdef CONFIG_CMD_I2C 146 #define CONFIG_I2C_MXS 147 #define CONFIG_HARD_I2C 148 #ifndef CONFIG_SYS_I2C_SPEED 149 #define CONFIG_SYS_I2C_SPEED 400000 150 #endif 151 #endif 152 153 /* LCD */ 154 #ifdef CONFIG_VIDEO 155 #define CONFIG_CFB_CONSOLE 156 #define CONFIG_VIDEO_MXS 157 #define CONFIG_VIDEO_SW_CURSOR 158 #define CONFIG_VGA_AS_SINGLE_DEVICE 159 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 160 #endif 161 162 /* MMC */ 163 #ifdef CONFIG_CMD_MMC 164 #define CONFIG_MMC 165 #define CONFIG_GENERIC_MMC 166 #define CONFIG_BOUNCE_BUFFER 167 #define CONFIG_MXS_MMC 168 #endif 169 170 /* NAND */ 171 #ifdef CONFIG_CMD_NAND 172 #define CONFIG_NAND_MXS 173 #define CONFIG_SYS_MAX_NAND_DEVICE 1 174 #define CONFIG_SYS_NAND_BASE 0x60000000 175 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 176 #endif 177 178 /* SPI */ 179 #ifdef CONFIG_CMD_SPI 180 #define CONFIG_HARD_SPI 181 #define CONFIG_MXS_SPI 182 #define CONFIG_SPI_HALF_DUPLEX 183 #endif 184 185 /* USB */ 186 #ifdef CONFIG_CMD_USB 187 #define CONFIG_USB_EHCI 188 #define CONFIG_USB_EHCI_MXS 189 #define CONFIG_EHCI_IS_TDI 190 #endif 191 192 #endif /* __CONFIGS_MXS_H__ */ 193