1 /* 2 * Copyright (C) 2013 Marek Vasut <marex@denx.de> 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License as 6 * published by the Free Software Foundation; either version 2 of 7 * the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 17 * MA 02111-1307 USA 18 */ 19 #ifndef __CONFIGS_MXS_H__ 20 #define __CONFIGS_MXS_H__ 21 22 /* 23 * Includes 24 */ 25 26 #if defined(CONFIG_MX23) && defined(CONFIG_MX28) 27 #error Select either CONFIG_MX23 or CONFIG_MX28 , never both! 28 #elif !defined(CONFIG_MX23) && !defined(CONFIG_MX28) 29 #error Select one of CONFIG_MX23 or CONFIG_MX28 ! 30 #endif 31 32 #include <asm/arch/regs-base.h> 33 34 #if defined(CONFIG_MX23) 35 #include <asm/arch/iomux-mx23.h> 36 #elif defined(CONFIG_MX28) 37 #include <asm/arch/iomux-mx28.h> 38 #endif 39 40 /* 41 * CPU specifics 42 */ 43 44 /* Startup hooks */ 45 #define CONFIG_BOARD_EARLY_INIT_F 46 #define CONFIG_ARCH_MISC_INIT 47 48 /* SPL */ 49 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE 50 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" 51 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" 52 #define CONFIG_SPL_LIBCOMMON_SUPPORT 53 #define CONFIG_SPL_LIBGENERIC_SUPPORT 54 #define CONFIG_SPL_SERIAL_SUPPORT 55 #define CONFIG_SPL_GPIO_SUPPORT 56 57 /* Memory sizes */ 58 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ 59 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ 60 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ 61 62 /* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */ 63 #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 64 #if defined(CONFIG_MX23) 65 #define CONFIG_SYS_INIT_RAM_SIZE (32 * 1024) 66 #elif defined(CONFIG_MX28) 67 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) 68 #endif 69 70 /* Point initial SP in SRAM so SPL can use it too. */ 71 #define CONFIG_SYS_INIT_SP_OFFSET \ 72 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 73 #define CONFIG_SYS_INIT_SP_ADDR \ 74 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 75 76 /* 77 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some 78 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot 79 * binary. In case there was more of this mess, 0x100 bytes are skipped. 80 * 81 * In case of a HAB boot, we cannot for some weird reason use the first 4KiB 82 * of DRAM when loading. Moreover, we use the first 4 KiB for IVT and CST 83 * blocks, thus U-Boot starts at offset +8 KiB of DRAM start. 84 * 85 * As for the SPL, we must avoid the first 4 KiB as well, but we load the 86 * IVT and CST to 0x8000, so we don't need to waste the subsequent 4 KiB. 87 */ 88 #define CONFIG_SYS_TEXT_BASE 0x40002000 89 #define CONFIG_SPL_TEXT_BASE 0x00001000 90 91 /* U-Boot general configuration */ 92 #define CONFIG_SYS_LONGHELP 93 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 94 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 95 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 96 /* Boot argument buffer size */ 97 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */ 98 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 99 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 100 #define CONFIG_SYS_HUSH_PARSER 101 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 102 103 /* Booting Linux */ 104 #define CONFIG_CMDLINE_TAG 105 #define CONFIG_SETUP_MEMORY_TAGS 106 107 /* 108 * Drivers 109 */ 110 111 /* APBH DMA */ 112 #define CONFIG_APBH_DMA 113 114 /* GPIO */ 115 #define CONFIG_MXS_GPIO 116 117 /* 118 * DUART Serial Driver. 119 * Conflicts with AUART driver which can be set by board. 120 */ 121 #define CONFIG_PL011_SERIAL 122 #define CONFIG_PL011_CLOCK 24000000 123 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } 124 #define CONFIG_CONS_INDEX 0 125 /* Default baudrate can be overriden by board! */ 126 #ifndef CONFIG_BAUDRATE 127 #define CONFIG_BAUDRATE 115200 128 #endif 129 130 /* FEC Ethernet on SoC */ 131 #ifdef CONFIG_FEC_MXC 132 #define CONFIG_MII 133 #ifndef CONFIG_ETHPRIME 134 #define CONFIG_ETHPRIME "FEC0" 135 #endif 136 #ifndef CONFIG_FEC_XCV_TYPE 137 #define CONFIG_FEC_XCV_TYPE RMII 138 #endif 139 #endif 140 141 /* I2C */ 142 #ifdef CONFIG_CMD_I2C 143 #define CONFIG_SYS_I2C 144 #define CONFIG_SYS_I2C_MXS 145 #define CONFIG_HARD_I2C 146 #ifndef CONFIG_SYS_I2C_SPEED 147 #define CONFIG_SYS_I2C_SPEED 400000 148 #endif 149 #endif 150 151 /* LCD */ 152 #ifdef CONFIG_VIDEO 153 #define CONFIG_CFB_CONSOLE 154 #define CONFIG_VIDEO_MXS 155 #define CONFIG_VIDEO_SW_CURSOR 156 #define CONFIG_VGA_AS_SINGLE_DEVICE 157 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 158 #endif 159 160 /* MMC */ 161 #ifdef CONFIG_CMD_MMC 162 #define CONFIG_MMC 163 #define CONFIG_GENERIC_MMC 164 #define CONFIG_BOUNCE_BUFFER 165 #define CONFIG_MXS_MMC 166 #endif 167 168 /* NAND */ 169 #ifdef CONFIG_CMD_NAND 170 #define CONFIG_NAND_MXS 171 #define CONFIG_SYS_MAX_NAND_DEVICE 1 172 #define CONFIG_SYS_NAND_BASE 0x60000000 173 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 174 #endif 175 176 /* OCOTP */ 177 #ifdef CONFIG_CMD_FUSE 178 #define CONFIG_MXS_OCOTP 179 #endif 180 181 /* SPI */ 182 #ifdef CONFIG_CMD_SPI 183 #define CONFIG_HARD_SPI 184 #define CONFIG_MXS_SPI 185 #define CONFIG_SPI_HALF_DUPLEX 186 #endif 187 188 /* USB */ 189 #ifdef CONFIG_CMD_USB 190 #define CONFIG_USB_EHCI 191 #define CONFIG_USB_EHCI_MXS 192 #define CONFIG_EHCI_IS_TDI 193 #endif 194 195 #endif /* __CONFIGS_MXS_H__ */ 196