1 /* 2 * Copyright (C) 2015 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX7D SABRESD board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __MX7D_SABRESD_CONFIG_H 10 #define __MX7D_SABRESD_CONFIG_H 11 12 #include "mx7_common.h" 13 14 #define CONFIG_DBG_MONITOR 15 #define PHYS_SDRAM_SIZE SZ_1G 16 17 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR 18 19 /* Size of malloc() pool */ 20 #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) 21 22 #define CONFIG_BOARD_EARLY_INIT_F 23 #define CONFIG_BOARD_LATE_INIT 24 25 #define CONFIG_DISPLAY_BOARDINFO 26 27 /* Uncomment to enable secure boot support */ 28 /* #define CONFIG_SECURE_BOOT */ 29 #define CONFIG_CSF_SIZE 0x4000 30 31 /* Network */ 32 #define CONFIG_FEC_MXC 33 #define CONFIG_MII 34 #define CONFIG_FEC_XCV_TYPE RGMII 35 #define CONFIG_ETHPRIME "FEC" 36 #define CONFIG_FEC_MXC_PHYADDR 0 37 38 #define CONFIG_PHYLIB 39 #define CONFIG_PHY_BROADCOM 40 /* ENET1 */ 41 #define IMX_FEC_BASE ENET_IPS_BASE_ADDR 42 43 /* MMC Config*/ 44 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 45 46 /* PMIC */ 47 #define CONFIG_POWER 48 #define CONFIG_POWER_I2C 49 #define CONFIG_POWER_PFUZE3000 50 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 51 52 #undef CONFIG_BOOTM_NETBSD 53 #undef CONFIG_BOOTM_PLAN9 54 #undef CONFIG_BOOTM_RTEMS 55 56 /* I2C configs */ 57 #define CONFIG_SYS_I2C 58 #define CONFIG_SYS_I2C_MXC 59 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 60 #define CONFIG_SYS_I2C_SPEED 100000 61 62 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 63 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 64 65 #ifdef CONFIG_IMX_BOOTAUX 66 /* Set to QSPI1 A flash at default */ 67 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000 68 69 #define UPDATE_M4_ENV \ 70 "m4image=m4_qspi.bin\0" \ 71 "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \ 72 "update_m4_from_sd=" \ 73 "if sf probe 0:0; then " \ 74 "if run loadm4image; then " \ 75 "setexpr fw_sz ${filesize} + 0xffff; " \ 76 "setexpr fw_sz ${fw_sz} / 0x10000; " \ 77 "setexpr fw_sz ${fw_sz} * 0x10000; " \ 78 "sf erase 0x0 ${fw_sz}; " \ 79 "sf write ${loadaddr} 0x0 ${filesize}; " \ 80 "fi; " \ 81 "fi\0" \ 82 "m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0" 83 #else 84 #define UPDATE_M4_ENV "" 85 #endif 86 87 #define CONFIG_MFG_ENV_SETTINGS \ 88 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ 89 "rdinit=/linuxrc " \ 90 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ 91 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ 92 "g_mass_storage.iSerialNumber=\"\" "\ 93 "clk_ignore_unused "\ 94 "\0" \ 95 "initrd_addr=0x83800000\0" \ 96 "initrd_high=0xffffffff\0" \ 97 "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ 98 99 #define CONFIG_DFU_ENV_SETTINGS \ 100 "dfu_alt_info=image raw 0 0x800000;"\ 101 "u-boot raw 0 0x4000;"\ 102 "bootimg part 0 1;"\ 103 "rootfs part 0 2\0" \ 104 105 #define CONFIG_EXTRA_ENV_SETTINGS \ 106 UPDATE_M4_ENV \ 107 CONFIG_MFG_ENV_SETTINGS \ 108 CONFIG_DFU_ENV_SETTINGS \ 109 "script=boot.scr\0" \ 110 "image=zImage\0" \ 111 "console=ttymxc0\0" \ 112 "fdt_high=0xffffffff\0" \ 113 "initrd_high=0xffffffff\0" \ 114 "fdt_file=imx7d-sdb.dtb\0" \ 115 "fdt_addr=0x83000000\0" \ 116 "boot_fdt=try\0" \ 117 "ip_dyn=yes\0" \ 118 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ 119 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 120 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 121 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 122 "mmcautodetect=yes\0" \ 123 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 124 "root=${mmcroot}\0" \ 125 "loadbootscript=" \ 126 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 127 "bootscript=echo Running bootscript from mmc ...; " \ 128 "source\0" \ 129 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 130 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 131 "mmcboot=echo Booting from mmc ...; " \ 132 "run mmcargs; " \ 133 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 134 "if run loadfdt; then " \ 135 "bootz ${loadaddr} - ${fdt_addr}; " \ 136 "else " \ 137 "if test ${boot_fdt} = try; then " \ 138 "bootz; " \ 139 "else " \ 140 "echo WARN: Cannot load the DT; " \ 141 "fi; " \ 142 "fi; " \ 143 "else " \ 144 "bootz; " \ 145 "fi;\0" \ 146 "netargs=setenv bootargs console=${console},${baudrate} " \ 147 "root=/dev/nfs " \ 148 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 149 "netboot=echo Booting from net ...; " \ 150 "run netargs; " \ 151 "if test ${ip_dyn} = yes; then " \ 152 "setenv get_cmd dhcp; " \ 153 "else " \ 154 "setenv get_cmd tftp; " \ 155 "fi; " \ 156 "${get_cmd} ${image}; " \ 157 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 158 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 159 "bootz ${loadaddr} - ${fdt_addr}; " \ 160 "else " \ 161 "if test ${boot_fdt} = try; then " \ 162 "bootz; " \ 163 "else " \ 164 "echo WARN: Cannot load the DT; " \ 165 "fi; " \ 166 "fi; " \ 167 "else " \ 168 "bootz; " \ 169 "fi;\0" 170 171 #define CONFIG_BOOTCOMMAND \ 172 "mmc dev ${mmcdev};" \ 173 "mmc dev ${mmcdev}; if mmc rescan; then " \ 174 "if run loadbootscript; then " \ 175 "run bootscript; " \ 176 "else " \ 177 "if run loadimage; then " \ 178 "run mmcboot; " \ 179 "else run netboot; " \ 180 "fi; " \ 181 "fi; " \ 182 "else run netboot; fi" 183 184 #define CONFIG_SYS_MEMTEST_START 0x80000000 185 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) 186 187 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 188 #define CONFIG_SYS_HZ 1000 189 190 #define CONFIG_STACKSIZE SZ_128K 191 192 /* Physical Memory Map */ 193 #define CONFIG_NR_DRAM_BANKS 1 194 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 195 196 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 197 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 198 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 199 200 #define CONFIG_SYS_INIT_SP_OFFSET \ 201 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 202 #define CONFIG_SYS_INIT_SP_ADDR \ 203 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 204 205 /* FLASH and environment organization */ 206 #define CONFIG_SYS_NO_FLASH 207 #define CONFIG_ENV_SIZE SZ_8K 208 #define CONFIG_ENV_IS_IN_MMC 209 210 /* 211 * If want to use nand, define CONFIG_NAND_MXS and rework board 212 * to support nand, since emmc has pin conflicts with nand 213 */ 214 #ifdef CONFIG_NAND_MXS 215 #define CONFIG_CMD_NAND 216 #define CONFIG_CMD_NAND_TRIMFFS 217 218 /* NAND stuff */ 219 #define CONFIG_SYS_MAX_NAND_DEVICE 1 220 #define CONFIG_SYS_NAND_BASE 0x40000000 221 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 222 #define CONFIG_SYS_NAND_ONFI_DETECTION 223 224 /* DMA stuff, needed for GPMI/MXS NAND support */ 225 #define CONFIG_APBH_DMA 226 #define CONFIG_APBH_DMA_BURST 227 #define CONFIG_APBH_DMA_BURST8 228 #endif 229 230 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 231 #ifdef CONFIG_NAND_MXS 232 #define CONFIG_SYS_FSL_USDHC_NUM 1 233 #else 234 #define CONFIG_SYS_FSL_USDHC_NUM 2 235 #endif 236 237 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ 238 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 239 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ 240 241 /* USB Configs */ 242 #define CONFIG_USB_STORAGE 243 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 244 #define CONFIG_USB_HOST_ETHER 245 #define CONFIG_USB_ETHER_ASIX 246 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 247 #define CONFIG_MXC_USB_FLAGS 0 248 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 249 250 #define CONFIG_IMX_THERMAL 251 252 #define CONFIG_USBD_HS 253 254 #define CONFIG_USB_FUNCTION_MASS_STORAGE 255 256 /* USB Device Firmware Update support */ 257 #define CONFIG_USB_FUNCTION_DFU 258 #define CONFIG_DFU_MMC 259 #define CONFIG_DFU_RAM 260 261 #define CONFIG_VIDEO 262 #ifdef CONFIG_VIDEO 263 #define CONFIG_CFB_CONSOLE 264 #define CONFIG_VIDEO_MXS 265 #define CONFIG_VIDEO_LOGO 266 #define CONFIG_VIDEO_SW_CURSOR 267 #define CONFIG_VGA_AS_SINGLE_DEVICE 268 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 269 #define CONFIG_SPLASH_SCREEN 270 #define CONFIG_SPLASH_SCREEN_ALIGN 271 #define CONFIG_CMD_BMP 272 #define CONFIG_BMP_16BPP 273 #define CONFIG_VIDEO_BMP_RLE8 274 #define CONFIG_VIDEO_BMP_LOGO 275 #endif 276 277 #ifdef CONFIG_FSL_QSPI 278 #define CONFIG_SPI_FLASH 279 #define CONFIG_SPI_FLASH_MACRONIX 280 #define CONFIG_SPI_FLASH_BAR 281 #define CONFIG_SF_DEFAULT_BUS 0 282 #define CONFIG_SF_DEFAULT_CS 0 283 #define CONFIG_SF_DEFAULT_SPEED 40000000 284 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 285 #define FSL_QSPI_FLASH_NUM 1 286 #define FSL_QSPI_FLASH_SIZE SZ_64M 287 #define QSPI0_BASE_ADDR QSPI1_IPS_BASE_ADDR 288 #define QSPI0_AMBA_BASE QSPI0_ARB_BASE_ADDR 289 #endif 290 291 #endif /* __CONFIG_H */ 292