1 /* 2 * Copyright (C) 2015 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX7D SABRESD board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __MX7D_SABRESD_CONFIG_H 10 #define __MX7D_SABRESD_CONFIG_H 11 12 #include "mx7_common.h" 13 14 #define CONFIG_DBG_MONITOR 15 #define PHYS_SDRAM_SIZE SZ_1G 16 17 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR 18 19 /* Size of malloc() pool */ 20 #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) 21 22 /* Network */ 23 #define CONFIG_FEC_MXC 24 #define CONFIG_MII 25 #define CONFIG_FEC_XCV_TYPE RGMII 26 #define CONFIG_ETHPRIME "FEC" 27 #define CONFIG_FEC_MXC_PHYADDR 0 28 29 #define CONFIG_PHYLIB 30 #define CONFIG_PHY_BROADCOM 31 /* ENET1 */ 32 #define IMX_FEC_BASE ENET_IPS_BASE_ADDR 33 34 /* MMC Config*/ 35 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 36 37 /* PMIC */ 38 #define CONFIG_POWER 39 #define CONFIG_POWER_I2C 40 #define CONFIG_POWER_PFUZE3000 41 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 42 43 #undef CONFIG_BOOTM_NETBSD 44 #undef CONFIG_BOOTM_PLAN9 45 #undef CONFIG_BOOTM_RTEMS 46 47 /* I2C configs */ 48 #define CONFIG_SYS_I2C 49 #define CONFIG_SYS_I2C_MXC 50 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 51 #define CONFIG_SYS_I2C_SPEED 100000 52 53 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 54 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 55 56 #ifdef CONFIG_IMX_BOOTAUX 57 /* Set to QSPI1 A flash at default */ 58 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000 59 60 #define UPDATE_M4_ENV \ 61 "m4image=m4_qspi.bin\0" \ 62 "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \ 63 "update_m4_from_sd=" \ 64 "if sf probe 0:0; then " \ 65 "if run loadm4image; then " \ 66 "setexpr fw_sz ${filesize} + 0xffff; " \ 67 "setexpr fw_sz ${fw_sz} / 0x10000; " \ 68 "setexpr fw_sz ${fw_sz} * 0x10000; " \ 69 "sf erase 0x0 ${fw_sz}; " \ 70 "sf write ${loadaddr} 0x0 ${filesize}; " \ 71 "fi; " \ 72 "fi\0" \ 73 "m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0" 74 #else 75 #define UPDATE_M4_ENV "" 76 #endif 77 78 #define CONFIG_MFG_ENV_SETTINGS \ 79 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ 80 "rdinit=/linuxrc " \ 81 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ 82 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ 83 "g_mass_storage.iSerialNumber=\"\" "\ 84 "clk_ignore_unused "\ 85 "\0" \ 86 "initrd_addr=0x83800000\0" \ 87 "initrd_high=0xffffffff\0" \ 88 "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ 89 90 #define CONFIG_DFU_ENV_SETTINGS \ 91 "dfu_alt_info=image raw 0 0x800000;"\ 92 "u-boot raw 0 0x4000;"\ 93 "bootimg part 0 1;"\ 94 "rootfs part 0 2\0" \ 95 96 #define CONFIG_EXTRA_ENV_SETTINGS \ 97 UPDATE_M4_ENV \ 98 CONFIG_MFG_ENV_SETTINGS \ 99 CONFIG_DFU_ENV_SETTINGS \ 100 "script=boot.scr\0" \ 101 "image=zImage\0" \ 102 "console=ttymxc0\0" \ 103 "fdt_high=0xffffffff\0" \ 104 "initrd_high=0xffffffff\0" \ 105 "fdt_file=imx7d-sdb.dtb\0" \ 106 "fdt_addr=0x83000000\0" \ 107 "boot_fdt=try\0" \ 108 "ip_dyn=yes\0" \ 109 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ 110 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 111 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 112 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 113 "mmcautodetect=yes\0" \ 114 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 115 "root=${mmcroot}\0" \ 116 "loadbootscript=" \ 117 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 118 "bootscript=echo Running bootscript from mmc ...; " \ 119 "source\0" \ 120 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 121 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 122 "mmcboot=echo Booting from mmc ...; " \ 123 "run mmcargs; " \ 124 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 125 "if run loadfdt; then " \ 126 "bootz ${loadaddr} - ${fdt_addr}; " \ 127 "else " \ 128 "if test ${boot_fdt} = try; then " \ 129 "bootz; " \ 130 "else " \ 131 "echo WARN: Cannot load the DT; " \ 132 "fi; " \ 133 "fi; " \ 134 "else " \ 135 "bootz; " \ 136 "fi;\0" \ 137 "netargs=setenv bootargs console=${console},${baudrate} " \ 138 "root=/dev/nfs " \ 139 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 140 "netboot=echo Booting from net ...; " \ 141 "run netargs; " \ 142 "if test ${ip_dyn} = yes; then " \ 143 "setenv get_cmd dhcp; " \ 144 "else " \ 145 "setenv get_cmd tftp; " \ 146 "fi; " \ 147 "${get_cmd} ${image}; " \ 148 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 149 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 150 "bootz ${loadaddr} - ${fdt_addr}; " \ 151 "else " \ 152 "if test ${boot_fdt} = try; then " \ 153 "bootz; " \ 154 "else " \ 155 "echo WARN: Cannot load the DT; " \ 156 "fi; " \ 157 "fi; " \ 158 "else " \ 159 "bootz; " \ 160 "fi;\0" 161 162 #define CONFIG_BOOTCOMMAND \ 163 "mmc dev ${mmcdev};" \ 164 "mmc dev ${mmcdev}; if mmc rescan; then " \ 165 "if run loadbootscript; then " \ 166 "run bootscript; " \ 167 "else " \ 168 "if run loadimage; then " \ 169 "run mmcboot; " \ 170 "else run netboot; " \ 171 "fi; " \ 172 "fi; " \ 173 "else run netboot; fi" 174 175 #define CONFIG_SYS_MEMTEST_START 0x80000000 176 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) 177 178 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 179 #define CONFIG_SYS_HZ 1000 180 181 #define CONFIG_STACKSIZE SZ_128K 182 183 /* Physical Memory Map */ 184 #define CONFIG_NR_DRAM_BANKS 1 185 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 186 187 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 188 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 189 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 190 191 #define CONFIG_SYS_INIT_SP_OFFSET \ 192 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 193 #define CONFIG_SYS_INIT_SP_ADDR \ 194 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 195 196 /* FLASH and environment organization */ 197 #define CONFIG_SYS_NO_FLASH 198 #define CONFIG_ENV_SIZE SZ_8K 199 #define CONFIG_ENV_IS_IN_MMC 200 201 /* MXC SPI driver support */ 202 #define CONFIG_MXC_SPI 203 204 /* 205 * If want to use nand, define CONFIG_NAND_MXS and rework board 206 * to support nand, since emmc has pin conflicts with nand 207 */ 208 #ifdef CONFIG_NAND_MXS 209 #define CONFIG_CMD_NAND 210 #define CONFIG_CMD_NAND_TRIMFFS 211 212 /* NAND stuff */ 213 #define CONFIG_SYS_MAX_NAND_DEVICE 1 214 #define CONFIG_SYS_NAND_BASE 0x40000000 215 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 216 #define CONFIG_SYS_NAND_ONFI_DETECTION 217 218 /* DMA stuff, needed for GPMI/MXS NAND support */ 219 #define CONFIG_APBH_DMA 220 #define CONFIG_APBH_DMA_BURST 221 #define CONFIG_APBH_DMA_BURST8 222 #endif 223 224 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 225 #ifdef CONFIG_NAND_MXS 226 #define CONFIG_SYS_FSL_USDHC_NUM 1 227 #else 228 #define CONFIG_SYS_FSL_USDHC_NUM 2 229 #endif 230 231 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ 232 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 233 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ 234 235 /* USB Configs */ 236 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 237 #define CONFIG_USB_HOST_ETHER 238 #define CONFIG_USB_ETHER_ASIX 239 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 240 #define CONFIG_MXC_USB_FLAGS 0 241 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 242 243 #define CONFIG_IMX_THERMAL 244 245 #define CONFIG_USBD_HS 246 247 #define CONFIG_USB_FUNCTION_MASS_STORAGE 248 249 #ifdef CONFIG_VIDEO 250 #define CONFIG_VIDEO_MXS 251 #define CONFIG_VIDEO_LOGO 252 #define CONFIG_SPLASH_SCREEN 253 #define CONFIG_SPLASH_SCREEN_ALIGN 254 #define CONFIG_CMD_BMP 255 #define CONFIG_BMP_16BPP 256 #define CONFIG_VIDEO_BMP_RLE8 257 #define CONFIG_VIDEO_BMP_LOGO 258 #endif 259 260 #ifdef CONFIG_FSL_QSPI 261 #define CONFIG_SPI_FLASH 262 #define CONFIG_SPI_FLASH_MACRONIX 263 #define CONFIG_SPI_FLASH_BAR 264 #define CONFIG_SF_DEFAULT_BUS 0 265 #define CONFIG_SF_DEFAULT_CS 0 266 #define CONFIG_SF_DEFAULT_SPEED 40000000 267 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 268 #define FSL_QSPI_FLASH_NUM 1 269 #define FSL_QSPI_FLASH_SIZE SZ_64M 270 #define QSPI0_BASE_ADDR QSPI1_IPS_BASE_ADDR 271 #define QSPI0_AMBA_BASE QSPI0_ARB_BASE_ADDR 272 #endif 273 274 #endif /* __CONFIG_H */ 275