1 /* 2 * Copyright (C) 2015 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX7D SABRESD board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __MX7D_SABRESD_CONFIG_H 10 #define __MX7D_SABRESD_CONFIG_H 11 12 #include "mx7_common.h" 13 14 #define CONFIG_DBG_MONITOR 15 #define PHYS_SDRAM_SIZE SZ_1G 16 17 /* Uncomment to enable secure boot support */ 18 /* #define CONFIG_SECURE_BOOT */ 19 #define CONFIG_CSF_SIZE 0x4000 20 21 /* Network */ 22 #define CONFIG_CMD_MII 23 #define CONFIG_FEC_MXC 24 #define CONFIG_MII 25 #define CONFIG_FEC_XCV_TYPE RGMII 26 #define CONFIG_ETHPRIME "FEC" 27 #define CONFIG_FEC_MXC_PHYADDR 0 28 29 #define CONFIG_PHYLIB 30 #define CONFIG_PHY_BROADCOM 31 /* ENET1 */ 32 #define IMX_FEC_BASE ENET_IPS_BASE_ADDR 33 34 /* MMC Config*/ 35 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 36 37 /* PMIC */ 38 #define CONFIG_POWER 39 #define CONFIG_POWER_I2C 40 #define CONFIG_POWER_PFUZE3000 41 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 42 43 #undef CONFIG_BOOTM_NETBSD 44 #undef CONFIG_BOOTM_PLAN9 45 #undef CONFIG_BOOTM_RTEMS 46 47 #undef CONFIG_CMD_EXPORTENV 48 #undef CONFIG_CMD_IMPORTENV 49 50 /* I2C configs */ 51 #define CONFIG_CMD_I2C 52 #define CONFIG_SYS_I2C 53 #define CONFIG_SYS_I2C_MXC 54 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 55 #define CONFIG_SYS_I2C_SPEED 100000 56 57 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 58 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 59 60 #define CONFIG_MFG_ENV_SETTINGS \ 61 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ 62 "rdinit=/linuxrc " \ 63 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ 64 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ 65 "g_mass_storage.iSerialNumber=\"\" "\ 66 "clk_ignore_unused "\ 67 "\0" \ 68 "initrd_addr=0x83800000\0" \ 69 "initrd_high=0xffffffff\0" \ 70 "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ 71 72 #define CONFIG_DFU_ENV_SETTINGS \ 73 "dfu_alt_info=image raw 0 0x800000;"\ 74 "u-boot raw 0 0x4000;"\ 75 "bootimg part 0 1;"\ 76 "rootfs part 0 2\0" \ 77 78 #define CONFIG_EXTRA_ENV_SETTINGS \ 79 CONFIG_MFG_ENV_SETTINGS \ 80 CONFIG_DFU_ENV_SETTINGS \ 81 "script=boot.scr\0" \ 82 "image=zImage\0" \ 83 "console=ttymxc0\0" \ 84 "fdt_high=0xffffffff\0" \ 85 "initrd_high=0xffffffff\0" \ 86 "fdt_file=imx7d-sdb.dtb\0" \ 87 "fdt_addr=0x83000000\0" \ 88 "boot_fdt=try\0" \ 89 "ip_dyn=yes\0" \ 90 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ 91 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 92 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 93 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 94 "mmcautodetect=yes\0" \ 95 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 96 "root=${mmcroot}\0" \ 97 "loadbootscript=" \ 98 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 99 "bootscript=echo Running bootscript from mmc ...; " \ 100 "source\0" \ 101 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 102 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 103 "mmcboot=echo Booting from mmc ...; " \ 104 "run mmcargs; " \ 105 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 106 "if run loadfdt; then " \ 107 "bootz ${loadaddr} - ${fdt_addr}; " \ 108 "else " \ 109 "if test ${boot_fdt} = try; then " \ 110 "bootz; " \ 111 "else " \ 112 "echo WARN: Cannot load the DT; " \ 113 "fi; " \ 114 "fi; " \ 115 "else " \ 116 "bootz; " \ 117 "fi;\0" \ 118 "netargs=setenv bootargs console=${console},${baudrate} " \ 119 "root=/dev/nfs " \ 120 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 121 "netboot=echo Booting from net ...; " \ 122 "run netargs; " \ 123 "if test ${ip_dyn} = yes; then " \ 124 "setenv get_cmd dhcp; " \ 125 "else " \ 126 "setenv get_cmd tftp; " \ 127 "fi; " \ 128 "${get_cmd} ${image}; " \ 129 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 130 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 131 "bootz ${loadaddr} - ${fdt_addr}; " \ 132 "else " \ 133 "if test ${boot_fdt} = try; then " \ 134 "bootz; " \ 135 "else " \ 136 "echo WARN: Cannot load the DT; " \ 137 "fi; " \ 138 "fi; " \ 139 "else " \ 140 "bootz; " \ 141 "fi;\0" 142 143 #define CONFIG_BOOTCOMMAND \ 144 "mmc dev ${mmcdev};" \ 145 "mmc dev ${mmcdev}; if mmc rescan; then " \ 146 "if run loadbootscript; then " \ 147 "run bootscript; " \ 148 "else " \ 149 "if run loadimage; then " \ 150 "run mmcboot; " \ 151 "else run netboot; " \ 152 "fi; " \ 153 "fi; " \ 154 "else run netboot; fi" 155 156 #define CONFIG_CMD_MEMTEST 157 #define CONFIG_SYS_MEMTEST_START 0x80000000 158 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) 159 160 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 161 #define CONFIG_SYS_HZ 1000 162 163 #define CONFIG_STACKSIZE SZ_128K 164 165 /* Physical Memory Map */ 166 #define CONFIG_NR_DRAM_BANKS 1 167 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 168 169 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 170 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 171 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 172 173 #define CONFIG_SYS_INIT_SP_OFFSET \ 174 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 175 #define CONFIG_SYS_INIT_SP_ADDR \ 176 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 177 178 /* FLASH and environment organization */ 179 #define CONFIG_SYS_NO_FLASH 180 #define CONFIG_ENV_SIZE SZ_8K 181 #define CONFIG_ENV_IS_IN_MMC 182 183 /* 184 * If want to use nand, define CONFIG_NAND_MXS and rework board 185 * to support nand, since emmc has pin conflicts with nand 186 */ 187 #ifdef CONFIG_NAND_MXS 188 #define CONFIG_CMD_NAND 189 #define CONFIG_CMD_NAND_TRIMFFS 190 191 /* NAND stuff */ 192 #define CONFIG_SYS_MAX_NAND_DEVICE 1 193 #define CONFIG_SYS_NAND_BASE 0x40000000 194 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 195 #define CONFIG_SYS_NAND_ONFI_DETECTION 196 197 /* DMA stuff, needed for GPMI/MXS NAND support */ 198 #define CONFIG_APBH_DMA 199 #define CONFIG_APBH_DMA_BURST 200 #define CONFIG_APBH_DMA_BURST8 201 #endif 202 203 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 204 #ifdef CONFIG_NAND_MXS 205 #define CONFIG_SYS_FSL_USDHC_NUM 1 206 #else 207 #define CONFIG_SYS_FSL_USDHC_NUM 2 208 #endif 209 210 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ 211 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 212 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ 213 214 /* USB Configs */ 215 #define CONFIG_CMD_USB 216 #define CONFIG_USB_EHCI 217 #define CONFIG_USB_EHCI_MX7 218 #define CONFIG_USB_STORAGE 219 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 220 #define CONFIG_USB_HOST_ETHER 221 #define CONFIG_USB_ETHER_ASIX 222 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 223 #define CONFIG_MXC_USB_FLAGS 0 224 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 225 226 #define CONFIG_IMX_THERMAL 227 228 #define CONFIG_CI_UDC 229 #define CONFIG_USBD_HS 230 #define CONFIG_USB_GADGET_DUALSPEED 231 232 #define CONFIG_USB_GADGET 233 #define CONFIG_CMD_USB_MASS_STORAGE 234 #define CONFIG_USB_FUNCTION_MASS_STORAGE 235 #define CONFIG_USB_GADGET_DOWNLOAD 236 #define CONFIG_USB_GADGET_VBUS_DRAW 2 237 238 #define CONFIG_G_DNL_VENDOR_NUM 0x0525 239 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 240 #define CONFIG_G_DNL_MANUFACTURER "FSL" 241 242 /* USB Device Firmware Update support */ 243 #define CONFIG_CMD_DFU 244 #define CONFIG_USB_FUNCTION_DFU 245 #define CONFIG_DFU_MMC 246 #define CONFIG_DFU_RAM 247 248 #define CONFIG_VIDEO 249 #ifdef CONFIG_VIDEO 250 #define CONFIG_CFB_CONSOLE 251 #define CONFIG_VIDEO_MXS 252 #define CONFIG_VIDEO_LOGO 253 #define CONFIG_VIDEO_SW_CURSOR 254 #define CONFIG_VGA_AS_SINGLE_DEVICE 255 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 256 #define CONFIG_SPLASH_SCREEN 257 #define CONFIG_SPLASH_SCREEN_ALIGN 258 #define CONFIG_CMD_BMP 259 #define CONFIG_BMP_16BPP 260 #define CONFIG_VIDEO_BMP_RLE8 261 #define CONFIG_VIDEO_BMP_LOGO 262 #endif 263 264 #ifdef CONFIG_FSL_QSPI 265 #define CONFIG_CMD_SF 266 #define CONFIG_SPI_FLASH 267 #define CONFIG_SPI_FLASH_MACRONIX 268 #define CONFIG_SPI_FLASH_BAR 269 #define CONFIG_SF_DEFAULT_BUS 0 270 #define CONFIG_SF_DEFAULT_CS 0 271 #define CONFIG_SF_DEFAULT_SPEED 40000000 272 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 273 #define FSL_QSPI_FLASH_NUM 1 274 #define FSL_QSPI_FLASH_SIZE SZ_64M 275 #define QSPI0_BASE_ADDR QSPI1_IPS_BASE_ADDR 276 #define QSPI0_AMBA_BASE QSPI0_ARB_BASE_ADDR 277 #endif 278 279 #endif /* __CONFIG_H */ 280